74VCXH162244MTD
74VCXH162244MTD Datasheet
74VCXH162244 Low Voltage 16-Bit Buffer/Line Driver with Bushold
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74VCXH162244MTD |
74VCXH162244MTD (pdf) |
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74VCXH162244MTX |
74VCXH162244MTX |
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| 74VCXH162244 Low Voltage 16-Bit Buffer/Line Driver with Bushold 74VCXH162244 Low Voltage 16-Bit Buffer/Line Driver with Bushold and 26 Series Resistor in Outputs The VCXH162244 contains sixteen non-inverting buffers with 3-STATE outputs to be employed as a memory and address driver, clock driver, or bus oriented transmitter/ receiver. The device is nibble 4-bit controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 16-bit operation. The VCXH162244 data inputs include active bushold circuitry, eliminating the need for external pull-up resistors to hold unused or floating data inputs at a valid logic level The 74VCXH162244 is also designed with 26 series resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/transmitters. The 74VCXH162244 is designed for low voltage 1.4V to 3.6V VCC applications with output capability up to 3.6V. The 74VCXH162244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation. s 1.4V to 3.6V VCC supply operation s 3.6V tolerant control inputs and outputs s Bushold on data inputs eliminates the need for external pull-up/pull-down resistors s 26 series resistors in outputs s tPD ns max for 3.0V to 3.6V VCC s Static Drive IOH/IOL r12 mA 3.0V VCC s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 300 mA s ESD performance: Human body model ! 2000V Machine model ! 200V Ordering Code: Order Number Package Number Package Description 74VCXH162244MTD MTD48 48-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide [TUBES] 74VCXH162244MTX Note 1 MTD48 48-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide [TAPE and REEL] Note 1 Use this Order Number to receive devices in Tape and Reel. Logic Symbol Pin Descriptions Pin Names Output Enable Input Active LOW Bushold Inputs Outputs 2005 Fairchild Semiconductor Corporation DS500231 74VCXH162244 Connection Diagram Truth Tables Inputs OE1 L H Outputs Inputs OE2 L H Outputs Inputs OE3 L H Outputs Inputs Outputs H HIGH Voltage Level L LOW Voltage Level X Immaterial HIGH or LOW, inputs may not float Z High Impedance Functional Description The 74VCXH162244 contains sixteen non-inverting buffers with 3-STATE outputs. The device is nibble 4 bits controlled with each nibble functioning identically, but independent of each other. The control pins may be shorted together to obtain full 16-bit operation.The 3-STATE outputs are controlled by an Output Enable OEn input. When OEn is LOW, the outputs are in the 2-state mode. When OEn is HIGH, the standard outputs are in the high impedance mode but this does not interfere with entering new data into the inputs. Logic Diagram 74VCXH162244 Absolute Maximum Ratings Note 2 Supply Voltage VCC DC Input Voltage VI OEn I0 I15 Output Voltage VO Outputs 3-STATE Outputs Active Note 3 DC Input Diode Current IIK VI 0V DC Output Diode Current IOK VO 0V VO ! VCC |
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