74VCX38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs
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74VCX38M (pdf) |
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74VCX38MTCX |
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74VCX38MTC |
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74VCX38MX |
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74VCX38BQX |
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74VCX38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs February 2008 74VCX38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs • 1.2V to 3.6V VCC supply operation • 3.6V tolerant inputs and outputs • tPD • 2.8ns max. for 3.0V to 3.6V VCC • Power-Off high impedance inputs and outputs • Static Drive IOL : +24mA 3.0V VCC • Uses patented Quiet Series noise/EMI reduction circuitry • Latchup performance exceeds JEDEC 78 conditions • ESD performance: Human body model > 2000V Machine model > 250V • Leadless DQFN package The VCX38 contains four 2-input NAND gates with open drain outputs. This product is designed for low voltage 1.2V to 3.6V VCC applications with I/O compatibility up to 3.6V. The VCX38 is fabricated with advanced CMOS technology to achieve high-speed operation while maintaining CMOS low power dissipation. Ordering Information Order Number Package Number Package Description 74VCX38M 74VCX38BQX 1 M14A MLP14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 14-Terminal Depopulated Quad Very-Thin Flat Pack No Leads DQFN , JEDEC MO-241, x 3.0mm 74VCX38MTC MTC14 14-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide Note DQFN package available in Tape and Reel only. Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC J-STD-020B standard. 74VCX38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs Connection Diagrams Pin Assignments for SOIC and TSSOP Logic Symbol IEEE/IEC Pad Assignments for DQFN Top View Pin Description Pin Names An, Bn On Description Inputs Outputs 1999 Fairchild Semiconductor Corporation 74VCX38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Parameter VCC VI VO IIK IOK IOL ICC or GND TSTG Supply Voltage DC Input Voltage Output Voltage 2 DC Input Diode Current, VI < 0V DC Output Diode Current, VO < 0V DC Output Source/Sink Current Supply Pin Storage Temperature Range Rating to +4.6V to 4.6V to 4.6V +50mA ±100mA to +150°C Note IO Absolute Maximum Rating must be observed. Recommended Operating Conditions 3 The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Parameter VCC VI VO IOL Power Supply Operating Input Voltage Output Voltage Output Current VCC = 3.0V to 3.6V VCC = 2.3V to 2.7V VCC = 1.65V to 2.3V VCC = 1.4V to 1.6V VCC = 1.2V Free Air Operating Temperature Minimum Input Edge Rate, VIN = 0.8V to 2.0V, VCC = 3.0V Note Floating or unused inputs must be held HIGH or LOW Rating 1.2V to 3.6V to 3.6V 0V to VCC ±24mA ±18mA ±6mA ±2mA ± 100µA to +85°C 10ns/V 1999 Fairchild Semiconductor Corporation 74VCX38 Low Voltage Quad 2-Input NAND Gate with Open Drain Outputs and 3.6V Tolerant Inputs and Outputs DC Electrical Characteristics Parameter HIGH Level Input Voltage LOW Level Input Voltage LOW Level Output Voltage Input Leakage Current |
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