74LVTH322373GX
74LVTH322373GX Datasheet
74LVT322373<br>• 74LVTH322373 Low Voltage 32-Bit Transparent Latch with 3-STATE Outputs and Series Resistors in the Outputs
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74LVTH322373GX |
74LVTH322373GX (pdf) |
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74LVTH322373G |
74LVTH322373G |
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| 74LVT322373 • 74LVTH322373 Low Voltage 32-Bit Transparent Latch with 3-STATE Outputs and Series Resistors in the Outputs 74LVT322373 • 74LVTH322373 Low Voltage 32-Bit Transparent Latch with 3-STATE Outputs and Series Resistors in the Outputs The LVT322373 and LVTH322373 contain thirty-two noninverting latches with 3-STATE outputs and are intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable LE is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable OE is LOW. When OE is HIGH, the outputs are in a high impedance state. The LVTH322373 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs. These latches are designed for low voltage 3.3V VCC applications, but with the capability to provide a TTL interface to a 5V environment. The LVT322373 and LVTH322373 are fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation. s Input and output interface capability to systems at 5V VCC s Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs 74LVTH322373 , also available without bushold feature 74LVT322373 s Live insertion/extraction permitted s Power Up/Down high impedance provides glitch-free bus loading s Outputs include equivalent series resistance of to make external termination resistors unnecessary and reduce overshoot and undershoot s ESD performance: Human-body model > 2000V Machine model > 200V Charged-device model > 1000V s Packaged in plastic Fine-Pitch Ball Grid Array FBGA Ordering Code: Order Number Package Number Package Description 74LVT322373G Note 1 Note 2 BGA96A 96-Ball Fine-Pitch Ball Grid Array FBGA , JEDEC MO-205, 5.5mm Wide 74LVTH322373G Note 1 Note 2 BGA96A 96-Ball Fine-Pitch Ball Grid Array FBGA , JEDEC MO-205, 5.5mm Wide Note 1 Ordering Code “G” indicates Trays. Note 2 Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol 2002 Fairchild Semiconductor Corporation DS500742 74LVT322373 • 74LVTH322373 Connection Diagram Pin Descriptions Pin Names OEn LEn Output Enable Input Active LOW Latch Enable Input Inputs 3-STATE Outputs FBGA Pin Assignments Top Thru View O0 OE1 LE1 O2 GND I2 O4 VCC1 O6 GND I6 O8 GND I8 O10 VCC1 O13 O12 GND I12 O14 O15 OE2 LE2 O17 O16 OE3 LE3 O19 O18 GND I18 O20 VCC2 O23 O22 GND I22 O25 O24 GND I24 O26 VCC2 O29 O28 GND I28 O30 O31 OE4 LE4 Truth Table Inputs Inputs H = HIGH Voltage Level L = LOW Voltage Level Outputs Outputs X = Immaterial Z = HIGH Impedance Inputs Outputs OE2 H L Inputs X L H X Z L H O0 |
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