74LCX32244G
74LCX32244G Datasheet
74LCX32244 Low Voltage 32-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs
| Part | Datasheet |
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74LCX32244G |
74LCX32244G (pdf) |
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74LCX32244GX |
74LCX32244GX |
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| 74LCX32244 Low Voltage 32-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs 74LCX32244 Low Voltage 32-Bit Buffer/Line Driver with 5V Tolerant Inputs and Outputs The LCX32244 contains thirty-two non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is nibble controlled. Each nibble has separate 3-STATE control inputs which can be shorted together for full 32-bit operation. The LCX32244 is designed for low voltage 2.5V or 3.3V VCC applications with capability of interfacing to a 5V signal environment. The LCX32244 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation. s 5V tolerant inputs and outputs s VCC specifications provided s ns tPD max VCC = 3.0V , 20 µA ICC max s Power down high impedance inputs and outputs s Supports live insertion/withdrawal Note 1 s ±24 mA output drive VCC = 3.0V s Uses patented noise/EMI reduction circuitry s Latch-up performance exceeds 500 mA s ESD performance: Human body model > 2000V Machine model > 200V s Packaged in plastic Fine-Pitch Ball Grid Array FBGA Note 1 To ensure the high-impedance state during power up or down OE should be tied to VCC through a pull-up resistor the minimum value or the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74LCX32244G Note 2 Note 3 BGA96A 96-Ball Fine-Pitch Ball Grid Array FBGA , JEDEC MO-205, 5.5mm Wide Note 2 Ordering code “G” indicates Trays. Note 3 Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol 2002 Fairchild Semiconductor Corporation DS500426 74LCX32244 Connection Diagram Pin Descriptions Top Thru View Functional Description The LCX32244 contains thirty-two non-inverting buffers with 3-STATE standard outputs. The device is nibble 4-bits controlled with each nibble functioning identically, but independent of the other. The control pins can be shorted together to obtain full 32-bit operation. The 3-STATE outputs are controlled by an Output Enable OEn input for each nibble. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs. Logic Diagrams Pin Names Output Enable Input Active LOW Inputs Outputs FBGA Pin Assignments O0 OE1 OE2 O2 GND I2 O6 GND I6 O8 GND I8 O10 VCC O13 O12 GND I12 O14 O15 OE4 OE3 I15 O17 O16 OE5 OE6 I16 O19 018 GND I18 O21 O20 VCC O23 O22 GND I22 O25 O24 GND I24 O27 O26 VCC O29 O28 GND I28 O30 O31 OE8 OE7 I31 Truth Table Inputs Outputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial HIGH or LOW, inputs may not float Z = High Impedance 74LCX32244 Absolute Maximum Ratings Note 4 Parameter Supply Voltage DC Input Voltage DC Output Voltage DC Input Diode Current DC Output Diode Current IO ICC IGND TSTG |
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