74F381PC

74F381PC Datasheet

74F381 4-Bit Arithmetic Logic Unit

Part	Datasheet
74F381PC	74F381PC (pdf)

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74F381 4-Bit Arithmetic Logic Unit 74F381 4-Bit Arithmetic Logic Unit The 74F381 performs three arithmetic and three logic operations on two 4-bit words, A and B. Two additional select input codes force the function outputs LOW or HIGH. Carry propagate and generate outputs are provided for use with the 74F182 carry lookahead generator for high-speed expansion to longer word lengths. For ripple expansion, refer to the 74F382 ALU data sheet. s Low input loading minimizes drive requirements s Performs six arithmetic and logic functions s Selectable LOW clear and HIGH preset functions s Carry generate and propagate outputs for use with carry lookahead generator Ordering Code: Order Number Package Number Package Description 74F381SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74F381SJ M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F381PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC 1999 Fairchild Semiconductor Corporation DS009528 74F381 Unit Loading/Fan Out Pin Names Cn G P A Operand Inputs B Operand Inputs Function Select Inputs Carry Input Carry Generate Output Active LOW Carry Propagate Output Active LOW Function Outputs U.L. HIGH/LOW Input IIH/IIL Output IOH/IOL 20 µA/−1.8 mA 20 µA/−1.8 mA 20 µA/−0.6 mA 20 µA/−2.4 mA −1 mA/20 mA −1 mA/20 mA −1 mA/20 mA Functional Description Signals applied to the Select inputs determine the mode of operation, as indicated in the Function Select Table. An extensive listing of input and output levels is shown in the Truth Table. The circuit performs the arithmetic functions for either active HIGH or active LOW operands, with output levels in the same convention. In the Subtract operating modes, it is necessary to force a carry HIGH for active HIGH operands, LOW for active LOW operands into the Cn input of the least significant package. The Carry Generate G and Carry Propagate P outputs supply input signals to the 74F182 carry lookahead generator for expansion to longer word length, as shown in Figure Note that an 74F382 ALU is used for the most significant package. Typical delays for Figure 2 are given in Figure Function Select Table Select Operation L Clear L B Minus A L A Minus B L A Plus B H = HIGH Voltage Level L = LOW Voltage Level H A+B H AB H Preset Path Segment Toward F Output Cn + 4, OVR Ai or Bi to P Pi to Cn + 'F182 Cn to F Cn or Cn + 4, OVR Total Delay FIGURE 16-Bit Delay Tabulation FIGURE 16-Bit Lookahead Carry ALU Expansion 74F381 Truth Table Inputs Outputs Function CLEAR B Minus A

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74F381 4-Bit Arithmetic Logic Unit
74F381 4-Bit Arithmetic Logic Unit

The 74F381 performs three arithmetic and three logic operations on two 4-bit words, A and B. Two additional select input codes force the function outputs LOW or HIGH. Carry propagate and generate outputs are provided for use with the 74F182 carry lookahead generator for high-speed expansion to longer word lengths. For ripple expansion, refer to the 74F382 ALU data sheet.
s Low input loading minimizes drive requirements s Performs six arithmetic and logic functions s Selectable LOW clear and HIGH preset functions s Carry generate and propagate outputs for use with carry
lookahead generator
Ordering Code:

Order Number Package Number

Package Description
74F381SC

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide
74F381SJ

M20D
20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74F381PC

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC
1999 Fairchild Semiconductor Corporation DS009528
74F381

Unit Loading/Fan Out

Pin Names

Cn G P

A Operand Inputs B Operand Inputs Function Select Inputs Carry Input Carry Generate Output Active LOW Carry Propagate Output Active LOW Function Outputs

U.L. HIGH/LOW

Input IIH/IIL Output IOH/IOL 20 µA/−1.8 mA 20 µA/−1.8 mA 20 µA/−0.6 mA 20 µA/−2.4 mA −1 mA/20 mA −1 mA/20 mA −1 mA/20 mA

Functional Description

Signals applied to the Select inputs determine the mode of operation, as indicated in the Function Select Table. An extensive listing of input and output levels is shown in the Truth Table. The circuit performs the arithmetic functions for either active HIGH or active LOW operands, with output levels in the same convention. In the Subtract operating modes, it is necessary to force a carry HIGH for active HIGH operands, LOW for active LOW operands into the Cn input of the least significant package.

The Carry Generate G and Carry Propagate P outputs supply input signals to the 74F182 carry lookahead generator for expansion to longer word length, as shown in Figure Note that an 74F382 ALU is used for the most significant package. Typical delays for Figure 2 are given in Figure

Function Select Table

Select

Operation

L Clear

L B Minus A

L A Minus B

L A Plus B

H = HIGH Voltage Level L = LOW Voltage Level

H A+B H AB H Preset

Path Segment

Toward F

Output Cn + 4, OVR

Ai or Bi to P

Pi to Cn + 'F182

Cn to F

Cn or Cn + 4, OVR

Total Delay

FIGURE 16-Bit Delay Tabulation

FIGURE 16-Bit Lookahead Carry ALU Expansion
74F381

Truth Table

Inputs

Outputs

Function

CLEAR

B Minus A

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Datasheet ID: 74F381PC 513330