74F158A Quad 2-Input Multiplexer
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74F158A Quad 2-Input Multiplexer 74F158A Quad 2-Input Multiplexer The F158A is a high speed quad 2-input multiplexer. It selects four bits of data from two sources using the common Select and Enable inputs. The four outputs present the selected data in the inverted form. The F158A can also generate any four of the 16 different functions of two variables. Ordering Code: Order Number Package Number Package Description 74F158ASC Note 1 M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 74F158ASJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F158APC N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Note 1 Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC 2004 Fairchild Semiconductor Corporation DS009484 74F158A Unit Loading/Fan Out Pin Names Source 0 Data Inputs Source 1 Data Inputs Enable Input Active LOW Select Input Inverted Outputs U.L. HIGH/LOW Input IIH/IIL Output IOH/IOL 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA 20 µA/−0.6 mA −1 mA/20 mA Truth Table Inputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Zn = E x I1nS + I0n S Outputs Functional Description The F158A quad 2-input multiplexer selects four bits of data from two sources under the control of a common Select input S and presents the data in inverted form at the four outputs. The Enable input E is active LOW. When E is HIGH, all of the outputs Z are forced HIGH regardless of all other inputs. The F158A is the logic implementation of a 4-pole, 2-position switch where the position of the switch is determined by the logic levels supplied to the Select input. A common use of the F158A is the moving of data from two groups of registers to four common output busses. The particular register from which the data comes is determined by the state of the Select input. A less obvious use is as a function generator. The F158A can generate four functions of two variables with one variable common. This is useful for implementing gating functions. Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74F158A Absolute Maximum Ratings Note 2 Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C VCC Pin Potential to Ground Pin Input Voltage Note 3 −0.5V to +7.0V −0.5V to +7.0V Input Current Note 3 −30 mA to mA Voltage Applied to Output in HIGH State with VCC = 0V Standard Output 3-STATE Output −0.5V to VCC −0.5V to +5.5V Current Applied to Output in LOW State Max twice the rated IOL mA ESD Last Passing Voltage Min 4000V Recommended Operating Conditions |
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