74F148PC

74F148PC Datasheet

74F148 8-Line to 3-Line Priority Encoder

Part	Datasheet
74F148PC	74F148PC (pdf)

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74F148 8-Line to 3-Line Priority Encoder 74F148 8-Line to 3-Line Priority Encoder The F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expanded via input and output enables to provide priority encoding over many bits. s Encodes eight data lines in priority s Provides 3-bit binary priority code s Input enable capability s Signals when data is present on any input s Cascadable for priority encoding of n bits Ordering Code: Order Number Package Number Package Description 74F148SC M16A 16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow 74F148SJ M16D 16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F148PC N16E 16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Truth Table Inputs Outputs EI I0 I1 I2 I3 I4 I5 I6 I7 GS A0 A1 A2 EO H HHH H HHH L H L HL L H L LHH L LHL H L XXXX LHHH L HHL H L XXX LHHHH L LH H L XX L H LH H L X L LHH H L HHH H H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial 2000 Fairchild Semiconductor Corporation DS009480 74F148 Unit Loading/Fan Out Pin Names U.L. HIGH/LOW Input IIH/IIL Output IOH/IOL I0 EI EO GS Priority Input Active LOW Priority Inputs Active LOW Enable Input Active LOW Enable Output Active LOW Group Signal Output Active LOW Address Outputs Active LOW 20 µA/−0.6 mA 20 µA/−1.2 mA 20 µA/−0.6 mA −1 mA/20 mA −1 mA/20 mA −1 mA/20 mA Functional Description The F148 8-input priority encoder accepts data from eight active LOW inputs and provides a binary representation on the three active LOW outputs. A priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output, with input line 7 having the highest priority. A HIGH on the Enable Input EI will force all outputs to the inactive HIGH state and allow new data to settle without producing erroneous information at the out- puts.A Group Signal output GS and Enable Output EO are provided along with the three priority data outputs A2, A1, A0 . GS is active LOW when any input is LOW this indicates when any input is active. EO is active LOW when all inputs are HIGH. Using the Enable Output along with the Enable Input allows cascading for priority encoding on any number of input signals. Both EO and GS are in the inactive HIGH state when the Enable Input is HIGH. Logic Diagram Application 16-Input Priority Encoder Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74F148 Absolute Maximum Ratings Note 1 Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C VCC Pin Potential to Ground Pin Input Voltage Note 2 −0.5V to +7.0V −0.5V to +7.0V Input Current Note 2 −30 mA to mA Voltage Applied to Output in HIGH State with VCC = 0V Standard Output 3-STATE Output −0.5V to VCC −0.5V to +5.5V Current Applied to Output

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74F148 8-Line to 3-Line Priority Encoder
74F148 8-Line to 3-Line Priority Encoder

The F148 provides three bits of binary coded output representing the position of the highest order active input, along with an output indicating the presence of any active input. It is easily expanded via input and output enables to provide priority encoding over many bits.
s Encodes eight data lines in priority s Provides 3-bit binary priority code s Input enable capability s Signals when data is present on any input s Cascadable for priority encoding of n bits
Ordering Code:

Order Number Package Number

Package Description
74F148SC

M16A
16-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-012, Narrow
74F148SJ

M16D
16-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74F148PC

N16E
16-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Truth Table

Inputs

Outputs

EI I0 I1 I2 I3 I4 I5 I6 I7 GS A0 A1 A2 EO H HHH H HHH L H L HL L H L LHH L LHL H L XXXX LHHH L HHL H L XXX LHHHH L LH H L XX L H LH H L X L LHH H L HHH H

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial
2000 Fairchild Semiconductor Corporation DS009480
74F148

Unit Loading/Fan Out

Pin Names

U.L. HIGH/LOW

Input IIH/IIL Output IOH/IOL

I0 EI EO GS

Priority Input Active LOW Priority Inputs Active LOW Enable Input Active LOW Enable Output Active LOW Group Signal Output Active LOW Address Outputs Active LOW
20 µA/−0.6 mA 20 µA/−1.2 mA 20 µA/−0.6 mA −1 mA/20 mA −1 mA/20 mA −1 mA/20 mA

Functional Description

The F148 8-input priority encoder accepts data from eight active LOW inputs and provides a binary representation on the three active LOW outputs. A priority is assigned to each input so that when two or more inputs are simultaneously active, the input with the highest priority is represented on the output, with input line 7 having the highest priority. A HIGH on the Enable Input EI will force all outputs to the inactive HIGH state and allow new data to settle without producing erroneous information at the out-
puts.A Group Signal output GS and Enable Output EO are provided along with the three priority data outputs A2, A1, A0 . GS is active LOW when any input is LOW this indicates when any input is active. EO is active LOW when all inputs are HIGH. Using the Enable Output along with the Enable Input allows cascading for priority encoding on any number of input signals. Both EO and GS are in the inactive HIGH state when the Enable Input is HIGH.

Logic Diagram

Application
16-Input Priority Encoder

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74F148

Absolute Maximum Ratings Note 1

Storage Temperature
−65°C to +150°C

Ambient Temperature under Bias
−55°C to +125°C

Junction Temperature under Bias
−55°C to +150°C

VCC Pin Potential to Ground Pin Input Voltage Note 2
−0.5V to +7.0V −0.5V to +7.0V

Input Current Note 2
−30 mA to mA

Voltage Applied to Output
in HIGH State with VCC = 0V Standard Output 3-STATE Output
−0.5V to VCC −0.5V to +5.5V

Current Applied to Output

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Datasheet ID: 74F148PC 513277