74F14SJ

74F14SJ Datasheet

74F14 Hex Inverter Schmitt Trigger

Part	Datasheet
74F14SJ	74F14SJ (pdf)

Related Parts	Information
74F14SCX	74F14SCX
74F14SJX	74F14SJX
74F14SC	74F14SC
74F14PC	74F14PC

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74F14 Hex Inverter Schmitt Trigger 74F14 Hex Inverter Schmitt Trigger The 74F14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have a greater noise margin than conventional inverters. Each circuit contains a Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL totem-pole output. The Schmitt trigger uses positive feed back to effectively speed-up slow input transition, and provide different input threshold voltages for positive and negative-going transitions. This hysteresis between the positive-going and negative-going input thresholds typically 800 mV is determined internally by resistor ratios and is essentially insensitive to temperature and supply voltage variations. Ordering Code: Order Number Package Number Package Description 74F14SC M14A 14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, Narrow 74F14SJ M14D 14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74F14PC N14A 14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram IEEE/IEC Unit Loading/Fan Out U.L. Input IIH/IIL Pin Names Description HIGH/LOW Output IOH/IOL Input 20 µA/−0.6 mA Output −1 mA/20 mA Function Table Input H = HIGH Voltage Level L = LOW Voltage Level Output O H L 2000 Fairchild Semiconductor Corporation DS009461 74F14 Absolute Maximum Ratings Note 1 Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage Note 2 Input Current Note 2 Voltage Applied to Output in HIGH State with VCC = 0V Standard Output 3-STATE Output Current Applied to Output in LOW State Max ESD Last Passing Voltage Min −65°C to +150°C −55°C to +125°C −55°C to +175°C −0.5V to +7.0V −0.5V to +7.0V −30 mA to mA −0.5V to VCC −0.5V to +5.5V twice the rated IOL mA 4000V Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage 0°C to +70°C +4.5V to +5.5V Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2 Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Symbol VT+ VT− VCD VOH IBVI ICEX IIL IOS ICCH ICCL Parameter Positive-Going Threshold Negative-Going Threshold Hysteresis Input Clamp Diode Voltage Output HIGH Voltage Output LOW Voltage

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74F14 Hex Inverter Schmitt Trigger
74F14 Hex Inverter Schmitt Trigger

The 74F14 contains six logic inverters which accept standard TTL input signals and provide standard TTL output levels. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals. In addition, they have a greater noise margin than conventional inverters.

Each circuit contains a Schmitt trigger followed by a Darlington level shifter and a phase splitter driving a TTL
totem-pole output. The Schmitt trigger uses positive feed back to effectively speed-up slow input transition, and provide different input threshold voltages for positive and negative-going transitions. This hysteresis between the positive-going and negative-going input thresholds typically 800 mV is determined internally by resistor ratios and is essentially insensitive to temperature and supply voltage variations.
Ordering Code:

Order Number Package Number

Package Description
74F14SC

M14A
14-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-120, Narrow
74F14SJ

M14D
14-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74F14PC

N14A
14-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

IEEE/IEC

Unit Loading/Fan Out

U.L.

Input IIH/IIL

Pin Names Description

HIGH/LOW Output IOH/IOL

Input
20 µA/−0.6 mA

Output
−1 mA/20 mA

Function Table

Input

H = HIGH Voltage Level L = LOW Voltage Level

Output O H L
2000 Fairchild Semiconductor Corporation DS009461
74F14

Absolute Maximum Ratings Note 1

Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias VCC Pin Potential to Ground Pin Input Voltage Note 2 Input Current Note 2 Voltage Applied to Output
in HIGH State with VCC = 0V Standard Output 3-STATE Output Current Applied to Output in LOW State Max ESD Last Passing Voltage Min
−65°C to +150°C −55°C to +125°C −55°C to +175°C
−0.5V to +7.0V −0.5V to +7.0V −30 mA to mA
−0.5V to VCC −0.5V to +5.5V
twice the rated IOL mA 4000V

Recommended Operating Conditions

Free Air Ambient Temperature Supply Voltage
0°C to +70°C +4.5V to +5.5V

Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.

Note 2 Either voltage limit or current limit is sufficient to protect inputs.

DC Electrical Characteristics

Symbol VT+ VT− VCD VOH

IBVI

ICEX

IIL IOS ICCH ICCL

Parameter

Positive-Going Threshold

Negative-Going Threshold

Hysteresis Input Clamp Diode Voltage

Output HIGH Voltage Output LOW Voltage

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Datasheet ID: 74F14SJ 513276