74ALVC2245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26 Series Resistors in B Outputs
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74ALVC2245WMX (pdf) |
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74ALVC2245MTC |
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74ALVC2245MTCX |
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74ALVC2245WM |
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74ALVC2245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26 Series Resistors in B Outputs 74ALVC2245 Low Voltage Bidirectional Transceiver with 3.6V Tolerant Inputs and Outputs and 26 Series Resistors in B Outputs The ALVC2245 contains eight non-inverting bidirectional buffers with 3-STATE outputs and is intended for bus oriented applications. The T/R input determines the direction of data flow. The OE input disables both the A and B ports by placing them in a high impedance state. The 74ALVC2245 is designed for low voltage 1.65V to 3.6V VCC applications with I/O compatibility up to 3.6V. The ALVC2245 is also designed with 26 series resistance in the B Port outputs. This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers transmitters The 74ALVC2245 is fabricated with an advanced CMOS technology to achieve high-speed operation while maintaining low CMOS power dissipation. s 1.65V to 3.6V VCC supply operation s 3.6V tolerant inputs and outputs s 26 series resistors in B Port outputs s Power-off high impedance inputs and outputs s Supports Live Insertion and Withdrawal Note 1 s tPD A to B ns max for 3.0V to 3.6V VCC ns max for 2.3V to 2.7V VCC ns max for 1.65V to 1.95V VCC s Uses patented Quiet noise/EMI reduction circuitry s Latchup conforms to JEDEC JED78 s ESD performance: Human body model ! 2000V Machine model ! 200V Note 1 To ensure the high impedance state during power up and power down, OEn should be tied to VCC through a pull up resistor. The minimum value of the resistor is determined by the current sourcing capability of the driver. Ordering Code: Order Number Package Number Package Description 74ALVC2245WM M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74ALVC2245MTC MTC20 20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Pin Names OE T/R Output Enable Input Active LOW Transmit/Receive Input Side A Inputs or 3-STATE Outputs Side B Inputs or 3-STATE Outputs Quiet is a trademark of Fairchild Semiconductor Corporation. 2005 Fairchild Semiconductor Corporation DS500717 74ALVC2245 Connection Diagram Logic Diagram Truth Table Inputs OE T/R Outputs L Bus Data to Bus L H Bus Data to Bus H X HIGH Z State on Note 2 H HIGH Voltage Level L LOW Voltage Level X Immaterial Z High Impedance Note 2 Unused bus terminals during HIGH Z State must be held HIGH or LOW. 74ALVC2245 Absolute Maximum Ratings Note 3 Supply Voltage VCC DC Input Voltage VI Output Voltage VO Note 4 DC Input Diode Current IIK VI 0V DC Output Diode Current IOK VO 0V DC Output Source/Sink Current IOH/IOL DC VCC or GND Current per Supply Pin ICC or GND Storage Temperature Range TSTG to 4.6V to VCC r50 mA r100 mA to Recommended Operating Conditions Note 5 Power Supply Operating 1.65V to 3.6V Input Voltage Output Voltage VO Free Air Operating Temperature TA Minimum Input Edge Rate 't/'V 0V to VCC 0V to VCC to VIN 0.8V to 2.0V, VCC 3.0V 10 ns/V Note 3 The Absolute Maximum Ratings are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the Absolute Maximum Rat- ings. The “Recommended Operating Conditions” table will define the condi- tions for actual device operation. |
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