74ACTQ16541MTD Datasheet

74ACTQ16541 16-Bit Buffer/Line Driver with 3-STATE Outputs

Part Datasheet
74ACTQ16541MTD 74ACTQ16541MTD 74ACTQ16541MTD (pdf)
Related Parts Information
74ACTQ16541SSC 74ACTQ16541SSC 74ACTQ16541SSC
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74ACTQ16541 16-Bit Buffer/Line Driver with 3-STATE Outputs
74ACTQ16541 16-Bit Buffer/Line Driver with 3-STATE Outputs

The ACTQ16541 contains sixteen non-inverting buffers with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus oriented transmitter/receiver. The device is byte controlled. Each byte has separate 3-STATE control inputs which can be shorted together for full 16-bit operation.

The ACTQ16541 utilizes Fairchild Quiet technology to guarantee quiet output switching and improved dynamic threshold performance. FACT Quiet features output control for superior performance.
s Utilizes Fairchild FACT Quiet Series technology s Guaranteed simultaneous switching noise level and
dynamic threshold performance s Guaranteed pin-to-pin output skew s Separate control logic for each byte s 16-bit version of the ACTQ541 s Outputs source/sink 24 mA s Additional specs for Multiple Output Switching s Output loading specs for both 50 pF and 250 pF loads
Ordering Code:

Order Number Package Number

Package Description

48-Lead Small Shrink Outline Package SSOP , JEDEC MO-118, Wide

48-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 6.1mm Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbol

Connection Diagram

Pin Descriptions

Pin Names

Output Enable Input Active LOW Inputs Outputs

Quiet FACT Quiet and are trademarks of Fairchild Semiconductor Corporation 2005 Fairchild Semiconductor Corporation DS010936

Functional Description

The ACTQ16541 contains sixteen non-inverting buffers with 3-STATE standard outputs. The device is byte controlled with each byte functioning identically, but independent of the other. The control pins can be shorted together to obtain full 16-bit operation. The 3-STATE outputs are controlled by an Output Enable OEn input for each byte. When OEn is LOW, the outputs are in 2-state mode. When OEn is HIGH, the outputs are in the high impedance mode, but this does not interfere with entering new data into the inputs.

Logic Diagram

Truth Tables



H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance



Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI = VI = VCC + 0.5V DC Output Diode Current IOK VO = VO = VCC + 0.5V DC Output Voltage VO DC Output Source/Sink Current IO DC VCC or Ground Current per Output Pin

Storage Temperature
to +7.0V
mA +20 mA
mA +20 mA to VCC + 0.5V r50 mA
r50 mA to +150qC

Recommended Operating Conditions

Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate 'V/'t
4.5V to 5.5V
0V to VCC 0V to VCC to +85qC 125 mV/ns

VIN from 0.8V to 2.0V

VCC 4.5V, 5.5V

Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specifications.

DC Electrical Characteristics


TA = +25qC

TA = to +85qC Units

Guaranteed Limits


Minimum HIGH

Input Voltage
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Datasheet ID: 74ACTQ16541MTD 513202