74ACT818SPC

74ACT818SPC Datasheet

74ACT818 8-Bit Diagnostic Register

Part	Datasheet
74ACT818SPC	74ACT818SPC (pdf)

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74ACT818 8-Bit Diagnostic Register 74ACT818 8-Bit Diagnostic Register The ACT818 is a high-speed, general-purpose pipeline register with an on-board diagnostic register for performing serial diagnostics and/or writable control store loading. The D-to-Y path provides an 8-bit parallel data path pipeline register for normal system operation. The diagnostic register can load parallel data to or from the pipeline register and can output data through the D input port as in WCS loading . The 8-bit diagnostic register has multiplexer inputs that select parallel inputs from the Y-port or adjacent bits in the diagnostic register to operate as a right-shift-only register. This register can then participate in a serial loop throughout the system where normal data, address, status and control registers are replaced with ACT818 diagnostic pipeline registers. The loop can be used to scan in a complete test routine starting point Data, Address, etc. . Then after a specified number of machine cycles it scans out the results to be inspected for the expected results. WCS loading can be accomplished using the same technique. An instruction word can be serially shifted into the shadow register and written into the WCS RAM by enabling the D output. s On-line and off-line system diagnostics s Swaps the contents of diagnostic register and output register s Diagnostic register and diagnostic testing s Cascadable for wide control words as used in micropro- gramming s Edge-triggered D registers s Outputs source/sink 24 mA s ACT818 has TTL-compatible inputs s ACT818 is functionally- and pin-compatible to AMD Am29818 and MMI 74S818 • Register for microprogram control store • Status register • Data register • Instruction register • Interrupt mask register • Pipeline register • General purpose register • Parallel-serial/serial-parallel converter Ordering Code: Order Number Order Package Package Description 74ACT818SPC N24C 24-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Logic Symbol Connection Diagram is a trademark of Fairchild Semiconductor Corporation. 2000 Fairchild Semiconductor Corporation DS009801 74ACT818 Pin Descriptions Pin Names SDI DCLK MODE PCLK OEY SDO Description Data Inputs Serial Data Input Diagnostics Clock Control Input Pipeline Register Clock Output Enable Input Serial Data Output Data Outputs Functional Description Data transfers into the diagnostic register occur on the LOW-to-HIGH transition of DCLK. Mode and SDI determine what data source will be loaded. The pipeline register is loaded on the LOW-to-HIGH transition of PCLK. Mode selects whether the data source is the data input or the diagnostic register output. Because of the independence of the clock inputs, data can be shifted in the diagnostic register via DCLK and loaded into the pipeline register from the data input via PCLK simultaneously, as long as no setup or hold times are violated. This simultaneous operation is legal. Function Table Inputs Outputs SDI MODE DCLK PCLK SDO Diagnostic Reg. Pipeline Reg. SI<SI − 1, SO<SDI NA SI<YI PI<DI NA PI<SI Hold H = HIGH Voltage Level L = LOW Voltage Level = Immaterial = LOW-to-HIGH Clock Transition Operation Serial Shift Disabled Normal Load Pipeline Register Load Diagnostic Register from Y DI Disabled Load Pipeline Register from Diagnostic Register Hold Diagnostic Register DI Enabled Diagnostic Register Block Diagram 74ACT818 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V VI = VCC +0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source or Sink Current IO DC VCC or Ground Current per Output Pin I CC or IGND Storage Temperature TSTG Junction Temperature TJ PDIP −0.5V to +7.0V

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74ACT818 8-Bit Diagnostic Register
74ACT818 8-Bit Diagnostic Register

The ACT818 is a high-speed, general-purpose pipeline register with an on-board diagnostic register for performing serial diagnostics and/or writable control store loading.

The D-to-Y path provides an 8-bit parallel data path pipeline register for normal system operation. The diagnostic register can load parallel data to or from the pipeline register and can output data through the D input port as in WCS loading .

The 8-bit diagnostic register has multiplexer inputs that select parallel inputs from the Y-port or adjacent bits in the diagnostic register to operate as a right-shift-only register. This register can then participate in a serial loop throughout the system where normal data, address, status and control registers are replaced with ACT818 diagnostic pipeline registers. The loop can be used to scan in a complete test routine starting point Data, Address, etc. . Then after a specified number of machine cycles it scans out the results to be inspected for the expected results. WCS loading can be accomplished using the same technique. An instruction word can be serially shifted into the shadow register and written into the WCS RAM by enabling the D output.
s On-line and off-line system diagnostics s Swaps the contents of diagnostic register and output
register s Diagnostic register and diagnostic testing s Cascadable for wide control words as used in micropro-
gramming s Edge-triggered D registers s Outputs source/sink 24 mA s ACT818 has TTL-compatible inputs s ACT818 is functionally- and pin-compatible to AMD

Am29818 and MMI 74S818
• Register for microprogram control store
• Status register
• Data register
• Instruction register
• Interrupt mask register
• Pipeline register
• General purpose register
• Parallel-serial/serial-parallel converter
Ordering Code:

Order Number Order Package

Package Description
74ACT818SPC

N24C
24-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide

Logic Symbol

Connection Diagram
is a trademark of Fairchild Semiconductor Corporation.
2000 Fairchild Semiconductor Corporation DS009801
74ACT818

Pin Descriptions

Pin Names SDI DCLK MODE PCLK OEY SDO

Description Data Inputs Serial Data Input Diagnostics Clock Control Input Pipeline Register Clock Output Enable Input Serial Data Output Data Outputs

Functional Description

Data transfers into the diagnostic register occur on the LOW-to-HIGH transition of DCLK. Mode and SDI determine what data source will be loaded. The pipeline register is loaded on the LOW-to-HIGH transition of PCLK. Mode selects whether the data source is the data input or the diagnostic register output. Because of the independence of the clock inputs, data can be shifted in the diagnostic register via DCLK and loaded into the pipeline register from the data input via PCLK simultaneously, as long as no setup or hold times are violated. This simultaneous operation is legal.

Function Table

Inputs

Outputs

SDI MODE DCLK PCLK SDO Diagnostic Reg. Pipeline Reg.

SI<SI − 1,

SO<SDI NA

SI<YI

PI<DI NA

PI<SI

Hold

H = HIGH Voltage Level L = LOW Voltage Level
= Immaterial = LOW-to-HIGH Clock Transition

Operation

Serial Shift Disabled

Normal Load Pipeline Register Load Diagnostic Register from Y DI Disabled Load Pipeline Register from Diagnostic Register Hold Diagnostic Register DI Enabled

Diagnostic Register

Block Diagram
74ACT818

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V VI = VCC +0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source
or Sink Current IO DC VCC or Ground Current
per Output Pin I CC or IGND Storage Temperature TSTG Junction Temperature TJ

PDIP
−0.5V to +7.0V

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Datasheet ID: 74ACT818SPC 513181