CD4014BCN

CD4014BCN Datasheet

CD4014BM CD4014BC 8-Stage Static Shift Register

Part	Datasheet
CD4014BCN	CD4014BCN (pdf)

PDF Datasheet Preview
CD4014BM CD4014BC 8-Stage Static Shift Register February 1988 CD4014BM CD4014BC 8-Stage Static Shift Register The CD4014BM CD4014BC is an 8-stage parallel input serial output shift register A parallel serial control input enables individual JAM inputs to each of 8 stages Q outputs are available from the sixth seventh and eighth stages All outputs have equal source and sink current capabilities and conform to standard ‘‘B’’ series output drive When the parallel serial control input is in the logical ‘‘0’’ state data is serially shifted into the register synchronously with the positive transition of the clock When the parallel serial control input is in the logical ‘‘1’’ state data is jammed into each stage of the register synchronously with the positive transition of the clock All inputs are protected against static discharge with diodes to VDD and VSS Y Wide supply voltage range 3 0V to 15V Y High noise immunity Y Low power TTL compatibility 0 45 VDD typ Fan out of 2 driving 74L or 1 driving 74LS Y 5V 10V 15V parametric ratings Y Symmetrical output characteristics Y Maximum input leakage 1 mA at 15V over full temperature range Connection Diagram Dual-In-Line Package Truth Table Parallel Serial Input Serial PI 1 PI n Internal Control Level change X e Don’t care case Qnb1 Qnb1 Qn No Change Order Number CD4014B Top View Logic Diagram TL F 5947 1 C1995 National Semiconductor Corporation TL F 5947 TL F 5947 2 RRD-B30M105 Printed in U S A Absolute Maximum Ratings Notes 1 2 If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications Supply Voltage VDD Input Voltage VIN Storage Temperature Range TS Power Dissipation PD Dual-In-Line Small Outline b0 5V to a18V b0 5 to VDD a 0 5V

PDF Datasheet Preview

CD4014BM CD4014BC 8-Stage Static Shift Register

February 1988

CD4014BM CD4014BC 8-Stage Static Shift Register

The CD4014BM CD4014BC is an 8-stage parallel input serial output shift register A parallel serial control input enables individual JAM inputs to each of 8 stages Q outputs are available from the sixth seventh and eighth stages All outputs have equal source and sink current capabilities and conform to standard ‘‘B’’ series output drive

When the parallel serial control input is in the logical ‘‘0’’ state data is serially shifted into the register synchronously with the positive transition of the clock When the parallel serial control input is in the logical ‘‘1’’ state data is jammed into each stage of the register synchronously with the positive transition of the clock

All inputs are protected against static discharge with diodes to VDD and VSS

Y Wide supply voltage range
3 0V to 15V

Y High noise immunity Y Low power TTL
compatibility
0 45 VDD typ Fan out of 2 driving 74L
or 1 driving 74LS

Y 5V 10V 15V parametric ratings

Y Symmetrical output characteristics

Y Maximum input leakage 1 mA at 15V over full temperature range

Connection Diagram

Dual-In-Line Package

Truth Table

Parallel

Serial

Input

Serial

PI 1 PI n Internal

Control

Level change X e Don’t care case

Qnb1

Qnb1

Qn No Change

Order Number CD4014B

Top View

Logic Diagram

TL F 5947 1

C1995 National Semiconductor Corporation TL F 5947

TL F 5947 2 RRD-B30M105 Printed in U S A

Absolute Maximum Ratings Notes 1 2

If Military Aerospace specified devices are required please contact the National Semiconductor Sales Office Distributors for availability and specifications

Supply Voltage VDD

Input Voltage VIN

Storage Temperature Range TS

Power Dissipation PD Dual-In-Line Small Outline
b0 5V to a18V b0 5 to VDD a 0 5V

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived CD4014BCN Datasheet file may be downloaded here without warranties.

Datasheet ID: CD4014BCN 513550