74AC574<br>• 74ACT574 Octal D-Type Flip-Flop with 3-STATE Outputs
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74ACT574PC (pdf) |
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74ACT574SJ |
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74ACT574SJX |
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74ACT574SC |
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74ACT574MTC |
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74ACT574MTCX |
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74ACT574SCX |
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74AC574 • 74ACT574 Octal D-Type Flip-Flop with 3-STATE Outputs 74AC574 • 74ACT574 Octal D-Type Flip-Flop with 3-STATE Outputs The AC/ACT574 is a high-speed, low power octal flip-flop with a buffered common Clock CP and a buffered common Output Enable OE . The information presented to the D-type inputs is stored in the flip-flops on the LOW-to-HIGH Clock CP transition. The AC/ACT574 is functionally identical to the AC/ACT374 except for the pinouts. s ICC and IOZ reduced by 50% s Inputs and outputs on opposite sides of package allowing easy interface with microprocessors s Useful as input or output port for microprocessors s Functionally identical to AC/ACT374 s 3-STATE outputs for bus-oriented applications s Outputs source/sink 24 mA s ACT574 has TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74AC574SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide Body 74AC574SJ M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74AC574MTC MTC20 20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 74AC574PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 74ACT574SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-01 74ACT574SJ M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74ACT574MTC MTC20 20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 74ACT574PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names Data Inputs Clock Pulse Input 3-STATE Output Enable Input 3-STATE Outputs is a trademark of Fairchild Semiconductor Corporation. 1999 Fairchild Semiconductor Corporation DS009910 74AC574 • 74ACT574 Functional Description The AC/ACT574 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock CP transition. With the Output Enable OE LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flipflops. Logic Diagram Function Table Inputs Internal Outputs OE CP D Q Function H L NC Z Hold Z Hold Z Load Z Load L Data Available H Data Available L H L NC NC No Change in Data L H NC H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = High Impedance = LOW-to-HIGH Transition NC = No Change NC No Change in Data Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74AC574 • 74ACT574 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V VI = VCC +0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC +0.5V DC Output Voltage VO DC Output Source or Sink Current IO DC VCC or Ground Current Per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ PDIP −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC +0.5V −20 mA +20 mA −0.5V to VCC +0.5V ±50 mA ±50 mA −65°C to +150°C |
More datasheets: FODB100V | FODB101V | FODB101 | FODB102V | M14462 BK005 | M14462 BK002 | M14462 BK001 | F321MS/1 BK032 | 74ACT574SJ | 74ACT574SJX |
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