74ACT534SCX

74ACT534SCX Datasheet

74ACT534 Octal D-Type Flip-Flop with 3-STATE Outputs

Part	Datasheet
74ACT534SCX	74ACT534SCX (pdf)

Related Parts	Information
74ACT534SJX	74ACT534SJX
74ACT534SJ	74ACT534SJ
74ACT534PC	74ACT534PC
74ACT534SC	74ACT534SC

PDF Datasheet Preview
74ACT534 Octal D-Type Flip-Flop with 3-STATE Outputs 74ACT534 Octal D-Type Flip-Flop with 3-STATE Outputs The ACT534 is a high-speed, low-power octal D-type flipflop featuring separate D-type inputs for each flip-flop and 3-STATE outputs for bus-oriented applications. A buffered Clock CP and Output Enable OE are common to all flipflops. The ACT534 is the same as the ACT374 except that the outputs are inverted. s ICC and IOZ reduced by 50% s Edge-triggered D-type inputs s Buffered positive edge-triggered clock s 3-STATE outputs for bus-oriented applications s Outputs source/sink 24 mA s ACT534 has TTL-compatible inputs s Inverted output version of ACT374 Ordering Code: Order Number Package Number Package Description 74ACT534SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide Body 74ACT534SJ M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74ACT534PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names CP OE Description Data Inputs Clock Pulse Input 3-STATE Output Enable Input Complementary 3-STATE Outputs is a trademark of Fairchild Semiconductor Corporation. 1999 Fairchild Semiconductor Corporation DS009965 74ACT534 Functional Description The ACT534 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE complementary outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock CP Function Table transition. With the Output Enable OE LOW, the contents of the eight flip-flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops. Inputs H = HIGH Voltage Level L = LOW Voltage Level = Immaterial = LOW-to-HIGH Clock Transition Z = High Impedance O0 = Value stored from previous clock cycle Logic Diagram Output O L H O0 Z Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74ACT534 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source or Sink Current IO DC VCC or Ground Current per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ PDIP −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ±50 mA ±50 mA −65°C to +150°C 140°C Recommended Operating Conditions Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate VIN from 0.8V to 2.0V VCC 4.5V, 5.5V 4.5V to 5.5V 0V to VCC 0V to VCC −40°C to +85°C 125 mV/ns Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specifications. DC Electrical Characteristics

PDF Datasheet Preview

74ACT534 Octal D-Type Flip-Flop with 3-STATE Outputs
74ACT534 Octal D-Type Flip-Flop with 3-STATE Outputs

The ACT534 is a high-speed, low-power octal D-type flipflop featuring separate D-type inputs for each flip-flop and 3-STATE outputs for bus-oriented applications. A buffered Clock CP and Output Enable OE are common to all flipflops. The ACT534 is the same as the ACT374 except that the outputs are inverted.
s ICC and IOZ reduced by 50% s Edge-triggered D-type inputs s Buffered positive edge-triggered clock s 3-STATE outputs for bus-oriented applications s Outputs source/sink 24 mA s ACT534 has TTL-compatible inputs s Inverted output version of ACT374
Ordering Code:

Order Number Package Number

Package Description
74ACT534SC

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide Body
74ACT534SJ

M20D
20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74ACT534PC

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

Pin Descriptions

Pin Names CP OE

Description Data Inputs Clock Pulse Input 3-STATE Output Enable Input Complementary 3-STATE Outputs
is a trademark of Fairchild Semiconductor Corporation.
1999 Fairchild Semiconductor Corporation DS009965
74ACT534

Functional Description

The ACT534 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE complementary outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock CP

Function Table
transition. With the Output Enable OE LOW, the contents of the eight flip-flops are available at the outputs. When the OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flip-flops.

Inputs

H = HIGH Voltage Level L = LOW Voltage Level
= Immaterial = LOW-to-HIGH Clock Transition Z = High Impedance O0 = Value stored from previous clock cycle

Logic Diagram

Output O L H O0 Z

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74ACT534

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source
or Sink Current IO DC VCC or Ground Current
per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ

PDIP
−0.5V to +7.0V
−20 mA +20 mA −0.5V to VCC + 0.5V
−20 mA +20 mA −0.5V to VCC + 0.5V
±50 mA
±50 mA −65°C to +150°C
140°C

Recommended Operating Conditions

Supply Voltage VCC Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate

VIN from 0.8V to 2.0V VCC 4.5V, 5.5V
4.5V to 5.5V 0V to VCC 0V to VCC
−40°C to +85°C
125 mV/ns

Note 1 Absolute maximum ratings are those values beyond which damage to the device may occur. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation of circuits outside databook specifications.

DC Electrical Characteristics

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived 74ACT534SCX Datasheet file may be downloaded here without warranties.

Datasheet ID: 74ACT534SCX 513175