74AC574SJX

74AC574SJX Datasheet

74AC574<br>• 74ACT574 Octal D-Type Flip-Flop with 3-STATE Outputs

Part	Datasheet
74AC574SJX	74AC574SJX (pdf)

Related Parts	Information
74AC574SJ	74AC574SJ
74AC574SC	74AC574SC
74AC574PC	74AC574PC
74AC574MTCX	74AC574MTCX
74AC574MTC	74AC574MTC
74AC574SCX	74AC574SCX

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74AC574 • 74ACT574 Octal D-Type Flip-Flop with 3-STATE Outputs 74AC574 • 74ACT574 Octal D-Type Flip-Flop with 3-STATE Outputs The AC/ACT574 is a high-speed, low power octal flip-flop with a buffered common Clock CP and a buffered common Output Enable OE . The information presented to the D-type inputs is stored in the flip-flops on the LOW-to-HIGH Clock CP transition. The AC/ACT574 is functionally identical to the AC/ACT374 except for the pinouts. s ICC and IOZ reduced by 50% s Inputs and outputs on opposite sides of package allowing easy interface with microprocessors s Useful as input or output port for microprocessors s Functionally identical to AC/ACT374 s 3-STATE outputs for bus-oriented applications s Outputs source/sink 24 mA s ACT574 has TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74AC574SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74AC574SJ M20D Pb-Free 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74AC574MTC MTC20 20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 74AC574PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 74ACT574SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74ACT574SJ M20D Pb-Free 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74ACT574MTC MTC20 20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 74ACT574PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B. is a trademark of Fairchild Semiconductor Corporation. 2005 Fairchild Semiconductor Corporation DS009910 74AC574 • 74ACT574 Logic Symbols IEEE/IEC Connection Diagram Logic Diagram Pin Descriptions Pin Names CP OE Description Data Inputs Clock Pulse Input 3-STATE Output Enable Input 3-STATE Outputs Function Table Inputs Internal Outputs Function OE CP D Q H L NC L H L NC L H NC H HIGH Voltage Level L LOW Voltage Level X Immaterial High Impedance LOW-to-HIGH Transition NC No Change ON Z Hold Z Hold Z Load Z Load L Data Available H Data Available NC No Change in Data NC No Change in Data Functional Description The AC/ACT574 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock CP transition. With the Output Enable OE LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flipflops. Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. 74AC574 • 74ACT574 Absolute Maximum Ratings Note 1 Supply Voltage VCC DC Input Diode Current IIK VI VCC DC Input Voltage VI DC Output Diode Current IOK VO VCC DC Output Voltage VO DC Output Source or Sink Current IO DC VCC or Ground Current Per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ PDIP mA to VCC mA to VCC r50 mA r50 mA to 140qC Recommended Operating Conditions Supply Voltage VCC AC 2.0V to 6.0V 4.5V to 5.5V Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate 'V/'t 0V to VCC 0V to VCC to

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74AC574
• 74ACT574 Octal D-Type Flip-Flop with 3-STATE Outputs
74AC574
• 74ACT574 Octal D-Type Flip-Flop with 3-STATE Outputs

The AC/ACT574 is a high-speed, low power octal flip-flop with a buffered common Clock CP and a buffered common Output Enable OE . The information presented to the D-type inputs is stored in the flip-flops on the LOW-to-HIGH Clock CP transition.

The AC/ACT574 is functionally identical to the AC/ACT374 except for the pinouts.
s ICC and IOZ reduced by 50% s Inputs and outputs on opposite sides of package
allowing easy interface with microprocessors s Useful as input or output port for microprocessors s Functionally identical to AC/ACT374 s 3-STATE outputs for bus-oriented applications s Outputs source/sink 24 mA s ACT574 has TTL-compatible inputs
Ordering Code:

Order Number Package Number

Package Description
74AC574SC

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide
74AC574SJ

M20D

Pb-Free 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74AC574MTC

MTC20
20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
74AC574PC

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
74ACT574SC

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide
74ACT574SJ

M20D

Pb-Free 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74ACT574MTC

MTC20
20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
74ACT574PC

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Pb-Free package per JEDEC J-STD-020B.
is a trademark of Fairchild Semiconductor Corporation. 2005 Fairchild Semiconductor Corporation DS009910
74AC574
• 74ACT574

Logic Symbols

IEEE/IEC

Connection Diagram

Logic Diagram

Pin Descriptions

Pin Names CP OE

Description Data Inputs Clock Pulse Input 3-STATE Output Enable Input 3-STATE Outputs

Function Table

Inputs Internal Outputs

Function

OE CP D Q

H L NC

L H L NC

L H NC

H HIGH Voltage Level L LOW Voltage Level X Immaterial

High Impedance LOW-to-HIGH Transition NC No Change

ON Z Hold Z Hold Z Load Z Load L Data Available H Data Available NC No Change in Data NC No Change in Data

Functional Description

The AC/ACT574 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE true outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual D-type inputs that meet the setup and hold time requirements on the LOW-to-HIGH Clock CP transition. With the Output Enable OE LOW, the contents of the eight flip-flops are available at the outputs. When OE is HIGH, the outputs go to the high impedance state. Operation of the OE input does not affect the state of the flipflops.

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
74AC574
• 74ACT574

Absolute Maximum Ratings Note 1

Supply Voltage VCC DC Input Diode Current IIK

VI VCC DC Input Voltage VI DC Output Diode Current IOK VO VCC DC Output Voltage VO DC Output Source
or Sink Current IO DC VCC or Ground Current

Per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ

PDIP
mA to VCC
mA to VCC
r50 mA
r50 mA to
140qC

Recommended Operating Conditions

Supply Voltage VCC AC
2.0V to 6.0V
4.5V to 5.5V

Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate 'V/'t
0V to VCC 0V to VCC to

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Datasheet ID: 74AC574SJX 513105