74AC521SCX

74AC521SCX Datasheet

74AC521<br>• 74ACT521 8-Bit Identity Comparator

Part	Datasheet
74AC521SCX	74AC521SCX (pdf)

Related Parts	Information
74ACT521SJX	74ACT521SJX
74ACT521PC	74ACT521PC
74ACT521SCX	74ACT521SCX
74AC521MTC	74AC521MTC
74AC521MTCX	74AC521MTCX
74AC521SJX	74AC521SJX
74AC521SC	74AC521SC
74AC521SJ	74AC521SJ
74ACT521SJ	74ACT521SJ
74ACT521MTC	74ACT521MTC
74ACT521MTCX	74ACT521MTCX
74ACT521SC	74ACT521SC
74AC521PC	74AC521PC

PDF Datasheet Preview
74AC521 • 74ACT521 8-Bit Identity Comparator 74AC521 • 74ACT521 8-Bit Identity Comparator The AC/ACT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input. s ICC reduced by 50% s Compares two 8-bit words in ns typ s Expandable to any word length s 20-pin package s Outputs source/sink 24 mA s ACT521 has TTL-compatible inputs Ordering Code: Order Number Package Number Package Description 74AC521SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74AC521SJ M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74AC521MTC MTC20 20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 74AC521PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide 74ACT521SC M20B 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide 74ACT521SJ M20D 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 74ACT521MTC MTC20 20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 74ACT521PC N20A 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering table. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names TA = B OA = B Description Word A Inputs Word B Inputs Expansion or Enable Input Identity Output is a trademark of Fairchild Semiconductor Corporation. 2000 Fairchild Semiconductor Corporation DS009964 74AC521 • 74ACT521 Truth Table Inputs IA = B A = B Note 1 A = B Note 1 H = HIGH Voltage Level L = LOW Voltage Level Note 1 A0 = B0, A1 = B1, A2 = B2, etc. Outputs OA = B L H Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. Ripple Expansion Parallel Expansion 74AC521 • 74ACT521 Absolute Maximum Ratings Note 2 Supply Voltage VCC DC Input Diode Current IIK VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source or Sink Current IO DC VCC or Ground Current per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ PDIP −0.5V to +7.0V −20 mA +20 mA −0.5V to VCC + 0.5V −20 mA +20 mA −0.5V to VCC + 0.5V ±50 mA ±50 mA −65°C to +150°C 140°C Recommended Operating Conditions Supply Voltage VCC AC 2.0V to 6.0V 4.5V to 5.5V Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate

PDF Datasheet Preview

74AC521
• 74ACT521 8-Bit Identity Comparator
74AC521
• 74ACT521 8-Bit Identity Comparator

The AC/ACT521 is an expandable 8-bit comparator. It compares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA = B also serves as an active LOW enable input.
s ICC reduced by 50% s Compares two 8-bit words in ns typ s Expandable to any word length s 20-pin package s Outputs source/sink 24 mA s ACT521 has TTL-compatible inputs
Ordering Code:

Order Number Package Number

Package Description
74AC521SC

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide
74AC521SJ

M20D
20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74AC521MTC

MTC20
20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
74AC521PC

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
74ACT521SC

M20B
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide
74ACT521SJ

M20D
20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide
74ACT521MTC

MTC20
20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide
74ACT521PC

N20A
20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering table.

Logic Symbols

Connection Diagram

IEEE/IEC

Pin Descriptions

Pin Names TA = B OA = B

Description Word A Inputs Word B Inputs Expansion or Enable Input Identity Output
is a trademark of Fairchild Semiconductor Corporation.
2000 Fairchild Semiconductor Corporation DS009964
74AC521
• 74ACT521

Truth Table

Inputs

IA = B

A = B Note 1

A = B Note 1

H = HIGH Voltage Level L = LOW Voltage Level

Note 1 A0 = B0, A1 = B1, A2 = B2, etc.

Outputs

OA = B L H

Logic Diagram

Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.

Ripple Expansion

Parallel Expansion
74AC521
• 74ACT521

Absolute Maximum Ratings Note 2

Supply Voltage VCC DC Input Diode Current IIK

VI = −0.5V VI = VCC + 0.5V DC Input Voltage VI DC Output Diode Current IOK VO = −0.5V VO = VCC + 0.5V DC Output Voltage VO DC Output Source
or Sink Current IO DC VCC or Ground Current
per Output Pin ICC or IGND Storage Temperature TSTG Junction Temperature TJ

PDIP
−0.5V to +7.0V
−20 mA +20 mA −0.5V to VCC + 0.5V
−20 mA +20 mA −0.5V to VCC + 0.5V
±50 mA
±50 mA −65°C to +150°C
140°C

Recommended Operating Conditions

Supply Voltage VCC AC
2.0V to 6.0V
4.5V to 5.5V

Input Voltage VI Output Voltage VO Operating Temperature TA Minimum Input Edge Rate

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Datasheet ID: 74AC521SCX 513102