74ABT541CPC

74ABT541CPC Datasheet

74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs

Part	Datasheet
74ABT541CPC	74ABT541CPC (pdf)

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74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs 74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs The ABT541 is an octal buffer and line driver with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/ receiver. The ABT541 is similar to the ABT244 with broadside pinout. s Non-inverting buffers s Output sink capability of 64 mA, source capability of 32 mA s Guaranteed output skew s Guaranteed multiple output switching specifications s Output switching specified for both 50 pF and 250 pF loads s Guaranteed simultaneous switching, noise level and dynamic threshold performance s Guaranteed latchup protection s High impedance, glitch free bus loading during entire power up and power down cycle s Nondestructive hot insertion capability s Flow-through pinout for ease of PC board layout s Disable time less than enable time to avoid bus contention Ordering Code: Order Number Package Number Package Description 74ABT541CSC 74ABT541CSJ 74ABT541CMSA 74ABT541CMTC 74ABT541CPC M20B M20D MSA20 MTC20 N20A 20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide Body 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package SSOP , EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide Devices also available in Tape and Reel. Specify by appending suffix “X” to the ordering code. Connection Diagram Pin Descriptions Pin Names OE1, OE2 Output Enable Input Active LOW Inputs Outputs Truth Table Inputs H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance Outputs 1999 Fairchild Semiconductor Corporation DS011501 74ABT541 Absolute Maximum Ratings Note 1 Storage Temperature −65°C to +150°C Ambient Temperature under Bias −55°C to +125°C Junction Temperature under Bias −55°C to +150°C VCC Pin Potential to Ground Pin Input Voltage Note 2 −0.5V to +7.0V −0.5V to +7.0V Input Current Note 2 −30 mA to mA Voltage Applied to Any Output in the Disabled or Power-Off State −0.5V to 5.5V in the HIGH State Current Applied to Output −0.5V to VCC in LOW State Max DC Latchup Source Current twice the rated IOL mA −500 mA Over Voltage Latchup I/O Recommended Operating Conditions Free Air Ambient Temperature Supply Voltage Minimum Input Edge Rate Data Input Enable Input −40°C to +85°C +4.5V to +5.5V 50 mV/ns 20 mV/ns Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied. Note 2 Either voltage limit or current limit is sufficient to protect inputs. DC Electrical Characteristics Parameter

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74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs
74ABT541 Octal Buffer/Line Driver with 3-STATE Outputs

The ABT541 is an octal buffer and line driver with 3-STATE outputs designed to be employed as a memory and address driver, clock driver, or bus-oriented transmitter/ receiver. The ABT541 is similar to the ABT244 with broadside pinout.
s Non-inverting buffers s Output sink capability of 64 mA, source capability of
32 mA s Guaranteed output skew s Guaranteed multiple output switching specifications s Output switching specified for both 50 pF and 250 pF
loads s Guaranteed simultaneous switching, noise level and
dynamic threshold performance s Guaranteed latchup protection s High impedance, glitch free bus loading during entire
power up and power down cycle s Nondestructive hot insertion capability s Flow-through pinout for ease of PC board layout s Disable time less than enable time to avoid bus
contention
Ordering Code:

Order Number Package Number

Package Description
74ABT541CSC 74ABT541CSJ 74ABT541CMSA 74ABT541CMTC 74ABT541CPC

M20B M20D MSA20 MTC20 N20A
20-Lead Small Outline Integrated Circuit SOIC , JEDEC MS-013, Wide Body 20-Lead Small Outline Package SOP , EIAJ TYPE II, 5.3mm Wide 20-Lead Shrink Small Outline Package SSOP , EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package TSSOP , JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package PDIP , JEDEC MS-001, Wide
Devices also available in Tape and Reel. Specify by appending suffix “X” to the ordering code.

Connection Diagram

Pin Descriptions

Pin Names

OE1, OE2

Output Enable Input Active LOW Inputs Outputs

Truth Table

Inputs

H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial Z = High Impedance

Outputs
1999 Fairchild Semiconductor Corporation DS011501
74ABT541

Absolute Maximum Ratings Note 1

Storage Temperature
−65°C to +150°C

Ambient Temperature under Bias
−55°C to +125°C

Junction Temperature under Bias
−55°C to +150°C

VCC Pin Potential to Ground Pin Input Voltage Note 2
−0.5V to +7.0V −0.5V to +7.0V

Input Current Note 2
−30 mA to mA

Voltage Applied to Any Output
in the Disabled or

Power-Off State
−0.5V to 5.5V
in the HIGH State Current Applied to Output
−0.5V to VCC
in LOW State Max DC Latchup Source Current
twice the rated IOL mA −500 mA

Over Voltage Latchup I/O

Recommended Operating Conditions

Free Air Ambient Temperature Supply Voltage Minimum Input Edge Rate

Data Input Enable Input
−40°C to +85°C +4.5V to +5.5V
50 mV/ns 20 mV/ns

Note 1 Absolute maximum ratings are values beyond which the device may be damaged or have its useful life impaired. Functional operation under these conditions is not implied.

Note 2 Either voltage limit or current limit is sufficient to protect inputs.

DC Electrical Characteristics

Parameter

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Datasheet ID: 74ABT541CPC 513058