NOII4SM1300A-QWC

NOII4SM1300A-QWC Datasheet


Due to a patented pixel configuration a 60% fill factor and 50% quantum efficiency are obtained. This is combined with an on-chip double sampling technique to cancel fixed pattern noise.

Part Datasheet
NOII4SM1300A-QWC NOII4SM1300A-QWC NOII4SM1300A-QWC (pdf)
Related Parts Information
NOII4SM1300A-QDC NOII4SM1300A-QDC NOII4SM1300A-QDC
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CYII4SM1300AA

IBIS4-1300 MPxl Rolling Shutter CMOS Image Sensor

Overview

The IBIS4-1300 is a digital CMOS active pixel image sensor with SXGA format.

Due to a patented pixel configuration a 60% fill factor and 50% quantum efficiency are obtained. This is combined with an on-chip double sampling technique to cancel fixed pattern noise.
• SXGA resolution 1280 x 1024 pixels
• High sensitivity 20 uV/e• High fill factor 60%
• Quantum efficiency > 50% between 500 and 700 nm.
• 20 noise electrons = 50 noise photons
• Dynamic range 69 dB 2750:1 in single slope operation
• Extended dynamic range mode dB in double slope
integration
• On-chip 10 bit, 10 mega Samples/s ADC
• Programmable gain and offset output amplifier
• 4:1 sub sampling viewfinder mode 320x256 pixels
• Electronic shutter
• 7 x 7 um2 pixels
• Low fixed pattern noise 1% Vsat p/p
• Low dark current 344 pA/cm2
• 1055 electrons/s, 1 minute auto saturation
• RGB or monochrome
• Digital ADC gamma correction
Ordering Information

Marketing Part Number CYII4SM1300AA-QDC CYII4SM1300AA-QWC CYII4SD1300AA-QDC

Description Mono with Glass Mono without Glass Color Diagonal with Glass

Package 84-pin LCC
• San Jose, CA 95134-1709
• 408-943-2600
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Architecture of Image Sensor

Block Diagram
1280 x 1024 pixel array

CYII4SM1300AA
output amplifier
10 bit ADC

The IBIS4-1300 is an SXGA CMOS image sensor. The chip is composed of 3 modules an image sensor core, a programmable gain output amplifier, and an on-chip 10 bit ADC. Figure shows the architecture of the image sensor core.

Figure Architecture of Image Sensor Core

Pixel array
1286 x 1030 pixels

Reset row pointer Y reset shift register

Y readout shift register Readout row pointer

Clock_YL Sync_YL

Column amplifiers X shift register

Clock_YR Sync_YR

Clock_X Sync_X

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CYII4SM1300AA

Image Sensor Core Focal Plane Array

The core of the sensor is the pixel array with 1280 x 1024 SXGA active pixels. The name 'active pixels' refers to the amplifying element in each pixel.

This type of pixels offer a high light sensitivity combined with low temporal noise. The actual array size is 1286 x 1030 including the 6 dummy pixels in X and Y. Although the dummy pixels fall outside the SXGA format, their information can be used e.g. for color filter array interpolation.

Figure Pixel Selection Principle

Y readout shift register

X shift register

Next to the pixel array there are two Y shift registers, and one X shift register with the column amplifiers. The shift registers act as pointers to a certain row or column. The Y readout shift register accesses the row line of pixels that is currently readout. The X shift register selects a particular pixel of this row. The second Y shift register is used to point at the row of pixels that is reset. The delay between both Y row pointers determines the integration time -thus realizing the electronic shutter. A clock and a synchronization pulse control the shift registers. On every clock pulse, the pointer shifts one row/column further.

Table Optical and Electrical Characteristics

Pixel Characteristics

Pixel structure

Photodiode

Pixel size

Resolution

Pixel rate with on-chip ADC

Frame rate with on-chip ADC

Frame rate with analog output

A sync pulse is used to reset and initialize the shift registers to their first position. The smart column amplifiers compensate the offset variations between individual pixels. To do so, they need a specific pulse pattern on specific control signals before the start of the row readout. Table summarizes the optical and electrical characteristics of the image sensor. Some specifications are influenced by the output amplifier gain setting e.g., temporal noise, conversion factor,... . Therefore, all specifications are referred to an output amplifier gain equal to
Ordering Information

Marketing Part Number CYII4SM1300AA-QDC CYII4SM1300AA-QWC CYII4SD1300AA-QDC

Description Mono with Glass Mono without Glass Color Diagonal with Glass

Temperature Dependence of Dark Signal
1000 100
% of saturation

IBIS 4C
nominal operation, 512 x 512 pixels corner, 160 ms tint
offset long tint

RMS long tint
#pixels outside 6sigma

Package 84-pin LCC

The above graph is measured on an IBIS4-1300 under nominal operation, using breadboard. This particular sensor has about 100 "bad pixels" at RT.

Average offset =dark signal and RMS =FPN of dark signal are measured versus temperature. Offset is referred to the "short tint" offset at 20 C. Integration time was 160 ms = "long tint" .

Y-axis is the output signal 100% = ADC range

Useful Range of "Double Slope"

Which total dynamic range can reasonably be obtained with the dual slope feature of the IBIS4-1300?

Assuming that the "regular" S/N is 2000:1, and that one can put the knee point halfway the voltage range, the each piecewise linear halve has 1000:1 S/N. If the ratio between slopes is a, then the total dynamic range becomes 1000+a*1000 :1.

Example, is a=10, then the total dynamic range becomes

In practice, acceptable images are obtained with a up to Larger a's are useable, but near the knee, contrast artifacts become annoying.

Skipping Rows or Columns

Although these modes are not described in the datasheets, it is possible to skip rows or columns by simply applying additional CLK_YR + CLR_YL, or CLK_X pulses. The maximum clock frequency is not documented. But it is probable that one can reach at least 10 MHz in Y and 40 MHz in X.

Disclaimer

FillFactory image sensors are only warranted to meet the specifications as described in the production data sheet. Specifications are subject to change without notice.

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CYII4SM1300AA

Document History Page

Document Title CYII4SM1300AA IBIS4-1300 MPxl Rolling Shutter CMOS Image Sensor Document Number 38-05707

Issue Date

Orig. of Change

Description of Change
310213 See ECN

SIL Initial Cypress release.
*A 509557 See ECN QGS Converted to Frame file.
*B 642577 See ECN FPW Ordering information update.
*C 2766920 09/21/2009 NVEA Update Ordering Information and template. Add part number to title.

Cypress Semiconductor Corporation, The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Any Source Code software and/or firmware is owned by Cypress Semiconductor Corporation Cypress and is protected by and subject to worldwide patent protection United States and foreign , United States copyright laws and international treaty provisions. Cypress hereby grants to licensee a personal, non-exclusive, non-transferable license to copy, use, modify, create derivative works of, and compile the Cypress Source Code and derivative works for the sole purpose of creating custom software and or firmware in support of licensee product to be used only in conjunction with a Cypress integrated circuit as specified in the applicable agreement. Any reproduction, modification, translation, compilation, or representation of this Source Code except as specified above is prohibited without the express written permission of Cypress.

Disclaimer CYPRESS MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARD TO THIS MATERIAL, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. Cypress reserves the right to make changes without further notice to the materials described herein. Cypress does not assume any liability arising out of the application or use of any product or circuit described herein. Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress’ product in a life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.

Use may be limited by and subject to the applicable Cypress software license agreement.

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Purchase of I2C components from Cypress or one of its sublicensed Associated Companies conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. As from October 1st, 2006 Philips Semiconductors has a new trade name - NXP Semiconductors.

All products and company names mentioned in this document may be the trademarks of their respective holders.
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Datasheet ID: NOII4SM1300A-QWC 508199