MC9S12DJ64 Device User Guide
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MC9S12A32CFUE (pdf) |
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PDF Datasheet Preview |
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MC9S12DJ64 Device User Guide V01.20 DOCUMENT NUMBER 9S12DJ64DGV1/D Covers also MC9S12D64, MC9S12A64, MC9S12D32, MC9S12A32 Freescale Semiconductor, Inc. Freescale reserves the right to make changes without further notice to any products herein to improve reliability, function or design. Freescale does not assume any liability arising out of the application or use of any product or circuit described herein neither does it convey any license under its patent rights nor the rights of others. Freescale products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Freescale product could create a situation where personal injury or death may occur. Should Buyer purchase or use Freescale products for any such unintended or unauthorized application, Buyer shall indemnify and hold Freescale and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Freescale was negligent regarding the design or manufacture of the part. Number Date V01.00 16 NOV 19 NOV 2001 2001 V01.01 18 FEB 2002 18 FEB 2002 V01.02 6 MAR 2002 6 MAR 2002 V01.03 4 June 2002 4 June 2002 V01.04 4 July 2002 4 July 2002 V01.05 30 July 2002 30 July 2002 Author Description of Changes Initial version based on MC9SDP256-2.09 Version. In table 7 I/O Characteristics" of the electrical characteristics replaced tPULSE with tpign and tpval in lines "Port Interrupt Input Pulse and "Port Interrupt Input Pulse passed" respectively. Table "Oscillator Characteristics" removed "Oscillator start-up time from POR or STOP" row Table "5V I/O Characteristics" Updated Partial Drive IOH = and Full Drive IOH = Table "ATD Operating Characteristics" Distinguish IREFfor 1 and 2 ATD blocks on Table "ATD Electrical Characteristics" Update CINS to 22 pF Table "Operating Conditions" Changed VDD and VDDPLL to V min Removed Document number except from Cover Sheet Updated Table "Document References" Table "5V I/O Characteristics" Corrected Input Capacitance to 6pF Section "Device Pinout" 112-pin and 80-pin added in diagrams RXCAN0 to PJ6 and TXCAN0 to PJ7 Table "PLL Characteristics" Updated parameters K1 and f1 Figure "Basic PLL functional diagram" Inserted XFC pin in diagram Enhanced section "XFC Component Selection" Added to Sections ATD, ECT and PWM freeze mode = active BDM mode Added 1L86D to Table "Assigned Part ID numbers" Corrected MEMSIZ1 value in Table "Memory size registers" Subsection "Device Memory Map Removed Flash mapping from to Table "Signal Properties" Added column "Internal Pull Resistor". Preface Table "Document References" Changed to full naming for each block. Table "Interrupt Vector Locations", Column "Local Enable" Corrected several register and bit names. Figure "Recommended PCB Layout for 80QFP Corrected VREGEN pin position Thermal values for junction to board and package BGND pin pull-up Part Order Information Global Register Table Chip Summary mode of Operations chapter Section "Printed Circuit Board Layout Proposals" added Pierce Oscillator examples for 112LQFP and 80QFP MC9S12DJ64 Device User Guide V01.20 Number Date V01.06 20 Aug. 20 Aug. 2002 2002 |
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