MC100ES6056DT

MC100ES6056DT Datasheet

Order number MC100ES6056 Rev 3, 5/2004

Part	Datasheet
MC100ES6056DT	MC100ES6056DT (pdf)

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Freescale Semiconductor, Inc. MOTOROLA SEMICONDUCTOR TECHNICAL DATA 2.5V / 3.3V ECL/PECL/LVDS Dual Differential 2:1 Multiplexer The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. Multiple VBB pins are provided. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a µF capacitor and limit current sourcing or sinking to mA. When not used, VBB should be left open. The device features both individual and common select inputs to address both data path and random logic applications. The 100ES Series contains temperature compensation. • 360 ps Typical Propagation Delays • Maximum Frequency > 3 GHz Typical • PECL Mode Operating Range VCC = V to V with VEE = 0 V • ECL Mode Operating Range VCC = 0 V with VEE = V to V • Open Input Default State • Separate and Common Select • Q Output Will Default LOW with Inputs Open or at VEE • VBB Outputs • LVDS Input Compatible MC100ES6056 SCALE 2:1 DT SUFFIX 20 LEAD TSSOP PACKAGE CASE 948E DW SUFFIX 20 LEAD SOIC PACKAGE CASE 751D ORDERING INFORMATION Device Package MC100ES6056DT TSSOP-20 MC100ES6056DTR2 TSSOP-20 MC100ES6056DW SO-20 MC100ES6056DWR2 SO-20 Freescale Semiconductor, Inc... Motorola, Inc. 2004 For More Information On This Product, Go to: MC100ES6056 Freescale Semiconductor, Inc. VCC Q0 20 19 Q0 SEL0 COM_SEL SEL1 VCC Q1 18 17 16 15 14 13 Q1 VEE 12 11 Freescale Semiconductor, Inc... 1 2 3 4 5 6 7 8 9 10 D0a VBB0 D0b D1a VBB1 D1b Warning All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation. Figure 20-Lead Pinout Top View and Logic Diagram * Input function will default LOW when left open. Table Pin Description Pin D0a* D1a* D0a* D1a* D0b* D1b* D0b* D1b* SEL0* SEL1* COM_SEL* VBB0, VBB1 Q0 Q1 Q0 Q1 VCC VEE Function ECL Input Data a ECL Input Data a Invert ECL Input Data b ECL Input Data b Invert ECL Indiv. Select Input ECL Common Select Input Output Reference Voltage ECL True Outputs ECL Inverted Outputs Positive Supply Negative Supply Table Function Table SEL0 SEL1 X L H L COM_SEL Q0, Q0 Q1, Q1 a b a b Table General specifications Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model

PDF Datasheet Preview

Freescale Semiconductor, Inc.

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA
2.5V / 3.3V ECL/PECL/LVDS Dual Differential 2:1 Multiplexer

The MC100ES6056 is a dual, fully differential 2:1 multiplexer. The differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. Multiple VBB pins are provided.

The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a µF capacitor and limit current sourcing or sinking to mA. When not used, VBB should be left open.

The device features both individual and common select inputs to address both data path and random logic applications.

The 100ES Series contains temperature compensation.
• 360 ps Typical Propagation Delays
• Maximum Frequency > 3 GHz Typical
• PECL Mode Operating Range VCC = V to V with VEE = 0 V
• ECL Mode Operating Range VCC = 0 V with VEE = V to V
• Open Input Default State
• Separate and Common Select
• Q Output Will Default LOW with Inputs Open or at VEE
• VBB Outputs
• LVDS Input Compatible

MC100ES6056

SCALE 2:1

DT SUFFIX 20 LEAD TSSOP PACKAGE

CASE 948E

DW SUFFIX 20 LEAD SOIC PACKAGE

CASE 751D
ORDERING INFORMATION

Device

Package

MC100ES6056DT

TSSOP-20

MC100ES6056DTR2

TSSOP-20

MC100ES6056DW

SO-20

MC100ES6056DWR2

SO-20

Freescale Semiconductor, Inc...

Motorola, Inc. 2004

For More Information On This Product, Go to:

MC100ES6056

Freescale Semiconductor, Inc.

VCC Q0 20 19

Q0 SEL0 COM_SEL SEL1 VCC Q1 18 17 16 15 14 13

Q1 VEE 12 11

Freescale Semiconductor, Inc...
1 2 3 4 5 6 7 8 9 10 D0a VBB0 D0b D1a VBB1 D1b

Warning All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation.

Figure 20-Lead Pinout Top View and Logic Diagram
* Input function will default LOW when left open.

Table Pin Description

Pin D0a* D1a* D0a* D1a* D0b* D1b* D0b* D1b* SEL0* SEL1* COM_SEL* VBB0, VBB1 Q0 Q1 Q0 Q1 VCC VEE

Function ECL Input Data a ECL Input Data a Invert ECL Input Data b ECL Input Data b Invert ECL Indiv. Select Input ECL Common Select Input Output Reference Voltage ECL True Outputs ECL Inverted Outputs Positive Supply Negative Supply

Table Function Table

SEL0

SEL1

X L H L

COM_SEL

Q0, Q0

Q1, Q1
a b a b

Table General specifications

Characteristics

Internal Input Pulldown Resistor

Internal Input Pullup Resistor

ESD Protection

Human Body Model Machine Model

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Datasheet ID: MC100ES6056DT 635458