MC100ES6011D

MC100ES6011D Datasheet

The MC100ES6011 is a differential 1:2 fanout buffer. The ES6011 is ideal for applications requiring lower voltage.

Part	Datasheet
MC100ES6011D	MC100ES6011D (pdf)

PDF Datasheet Preview
Freescale Semiconductor Technical Data V/3.3 V ECL 1:2 Differential Fanout Buffer The MC100ES6011 is a differential 1:2 fanout buffer. The ES6011 is ideal for applications requiring lower voltage. The 100ES Series contains temperature compensation. • 270 ps Typical Propagation Delay • Maximum Frequency > 3 GHz Typical • PECL Mode Operating Range VCC = V to V with VEE = 0 V • ECL Mode Operating Range VCC = 0 V with VEE = V to V • Open Input Default State • Q Output Will Default LOW with Inputs Open or at VEE • LVDS Input Compatible • 8-Lead SOIC and TSSOP Pb-Free Packages Available MC100ES6011 D SUFFIX 8-LEAD SOIC PACKAGE CASE 751-07 EF SUFFIX 8-LEAD SOIC PACKAGE Pb-FREE PACKAGE CASE 751-07 DT SUFFIX 8-LEAD TSSOP PACKAGE CASE 1640-01 EJ SUFFIX 8-LEAD TSSOP PACKAGE Pb-FREE PACKAGE CASE 1640-01 Q0 1 Q0 2 8 VCC 7D 5 VEE Figure 8-Lead Pinout Top View and Logic Diagram ORDERING INFORMATION Device Package MC100ES6011D SO-8 MC100ES6011DR2 SO-8 MC100ES6011EF SO-8 Pb-Free MC100ES6011EFR2 SO-8 Pb-Free MC100ES6011DT TSSOP-8 MC100ES6011DTR2 TSSOP-8 MC100ES6011EJ TSSOP-8 Pb-Free MC100ES6011EJR2 TSSOP-8 Pb-Free PIN DESCRIPTION Pin D 1 , D 2 Function ECL Data Inputs Q0, Q0 Q1, Q1 ECL Data Outputs Positive Supply Negative Supply Pins will default LOW when left open. Pins will default to VCC/2 when left open. Freescale Semiconductor, Inc., All rights reserved. Table Attributes Characteristics Internal Input Pulldown Resistor Internal Input Pullup Resistor ESD Protection Human Body Model Machine Model Charged Device Model Thermal Resistance Junction to Ambient 0 LFPM, 8 SOIC 500 LFPM, 8 SOIC Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Value > 4000 V > 200 V > 1500 V 190°C/W 130°C/W Table Maximum Ratings 1 Parameter

PDF Datasheet Preview

Freescale Semiconductor Technical Data

V/3.3 V ECL 1:2 Differential Fanout Buffer

The MC100ES6011 is a differential 1:2 fanout buffer. The ES6011 is ideal for applications requiring lower voltage.

The 100ES Series contains temperature compensation.
• 270 ps Typical Propagation Delay
• Maximum Frequency > 3 GHz Typical
• PECL Mode Operating Range VCC = V to V with VEE = 0 V
• ECL Mode Operating Range VCC = 0 V with VEE = V to V
• Open Input Default State
• Q Output Will Default LOW with Inputs Open or at VEE
• LVDS Input Compatible
• 8-Lead SOIC and TSSOP Pb-Free Packages Available

MC100ES6011

D SUFFIX 8-LEAD SOIC PACKAGE

CASE 751-07

EF SUFFIX 8-LEAD SOIC PACKAGE

Pb-FREE PACKAGE CASE 751-07

DT SUFFIX 8-LEAD TSSOP PACKAGE

CASE 1640-01

EJ SUFFIX 8-LEAD TSSOP PACKAGE

Pb-FREE PACKAGE CASE 1640-01

Q0 1 Q0 2
8 VCC 7D
5 VEE

Figure 8-Lead Pinout Top View and Logic Diagram
ORDERING INFORMATION

Device

Package

MC100ES6011D

SO-8

MC100ES6011DR2

SO-8

MC100ES6011EF

SO-8 Pb-Free

MC100ES6011EFR2

SO-8 Pb-Free

MC100ES6011DT

TSSOP-8

MC100ES6011DTR2

TSSOP-8

MC100ES6011EJ

TSSOP-8 Pb-Free

MC100ES6011EJR2 TSSOP-8 Pb-Free

PIN DESCRIPTION

Pin D 1 , D 2

Function ECL Data Inputs

Q0, Q0 Q1, Q1 ECL Data Outputs

Positive Supply

Negative Supply

Pins will default LOW when left open.

Pins will default to VCC/2 when left open.

Freescale Semiconductor, Inc., All rights reserved.

Table Attributes

Characteristics

Internal Input Pulldown Resistor

Internal Input Pullup Resistor

ESD Protection

Human Body Model Machine Model Charged Device Model

Thermal Resistance Junction to Ambient
0 LFPM, 8 SOIC 500 LFPM, 8 SOIC

Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

Value
> 4000 V > 200 V > 1500 V
190°C/W 130°C/W

Table Maximum Ratings 1

Parameter

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Datasheet ID: MC100ES6011D 635455