MAX3625CUG+T

MAX3625CUG+T Datasheet

MAX3625

Part	Datasheet
MAX3625CUG+T	MAX3625CUG+T (pdf)

Related Parts	Information
MAX3625CUG+	MAX3625CUG+

PDF Datasheet Preview
MAX3625 Low-Jitter, Precision Clock Generator with Three Outputs The MAX3625 is a low-jitter precision clock generator optimized for networking applications. The device integrates a crystal oscillator and a phase-locked loop PLL clock multiplier to generate high-frequency clock outputs for Ethernet, 10G Fibre Channel, and other networking applications. Maxim’s proprietary PLL design features ultra-low jitter and excellent power-supply noise rejection, minimizing design risk for network equipment. The MAX3625 has three LVPECL outputs. Selectable output dividers and a selectable feedback divider allow a range of output frequencies. Crystal Oscillator Interface 24.8MHz to 27MHz CMOS Input Up to 320MHz Output Frequencies Ethernet 125MHz, 156.25MHz, 312.5MHz 10G Fibre Channel 159.375MHz, 318.75MHz Low Jitter 0.14psRMS 1.875MHz to 20MHz 0.38psRMS 12kHz to 20MHz Excellent Power-Supply Noise Rejection No External Loop Filter Capacitor Required Ethernet Networking Equipment Fibre Channel Storage Area Network Pin Configuration and Typical Application Circuit appear at end of data sheet. IN_SEL Ordering Information PART TEMP RANGE PIN-PACKAGE MAX3625CUG+ 0°C to +70°C 24 TSSOP +Denotes a lead-free package. PKG CODE U24-1 BYPASS SELA[1:0] Block Diagram REF_IN 27pF X_IN X_OUT 33pF SELA[1:0] SELB[1:0] FB_SEL BYPASS RESET LOGIC/POR RESET LVCMOS 0 1 CRYSTAL OSCILLATOR DIVIDERS M = 24, 25 NA = 1, 2, 4, 5 NB = 1, 2, 4, 5 620MHz TO 648MHz FILTER RESET DIVIDER M MAX3625 DIVIDER NA RESET LVPECL BUFFER RESET DIVIDER NB LVPECL BUFFER LVPECL BUFFER QA_OE QA QB1 QB_OE QB0 FB_SEL SELB[1:0] Maxim Integrated Products 1 For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at MAX3625 Low-Jitter, Precision Clock Generator with Three Outputs ABSOLUTE MAXIMUM RATINGS Supply Voltage Range VCC, VCCA, VCCO_A, VCCO_B to +4.0V Voltage Range at REF_IN, IN_SEL, FB_SEL, SELA[1:0], SELB[1:0], QA_OE, QB_OE, MR, BYPASS ..............-0.3V to VCC + 0.3V Voltage Range at X_IN Pin ...................................-0.3V to +1.2V Voltage Range at X_OUT Pin ......................-0.3V to VCC - 0.6V Current into QA, QA, QB0, QB0, QB1, QB1 .....................-56mA Continuous Power Dissipation TA = +70°C 24-Pin TSSOP derate 13.9mW/°C above +70°C .....1111mW Operating Junction Temperature Range ...........-55°C to +150°C Storage Temperature Range .............................-65°C to +160°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS VCC = +3.0V to +3.6V, TA = 0°C to +70°C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25°C, unless otherwise noted. Notes 1, 2 PARAMETER CONDITIONS Power-Supply Current Note 3 IN_SEL = high ICC IN_SEL = low CONTROL INPUT CHARACTERISTICS SELA[1:0], SELB[1:0], FB_SEL, IN_SEL, QA_OE, QB_OE, MR, BYPASS Pins Input Capacitance Input Pulldown Resistor RPULLDOWN Pins MR, FB_SEL Input Logic Bias Resistor RBIAS Pins SELA[1:0], SELB[1:0] Input Pullup Resistor RPULLUP Pins QA_OE, QB_OE, IN_SEL, BYPASS LVPECL OUTPUTS QA, QA, QB0, QB0, QB1, QB1 Pins Output High Voltage Output Low Voltage Peak-to-Peak Output-Voltage Swing Single-Ended Note 2 Clock Output Rise/Fall Time 20% to 80% Note 2 Output Duty-Cycle Distortion PLL enabled PLL bypassed Note 4 LVCMOS/LVTTL INPUTS SELA[1:0], SELB[1:0], FB_SEL, IN_SEL, QA_OE, QB_OE, MR, BYPASS Pins Input-Voltage High Input-Voltage Low Input High Current Input Low Current VIN = VCC VIN = 0V MIN TYP MAX UNITS

PDF Datasheet Preview

MAX3625

Low-Jitter, Precision Clock Generator with Three Outputs

The MAX3625 is a low-jitter precision clock generator optimized for networking applications. The device integrates a crystal oscillator and a phase-locked loop PLL clock multiplier to generate high-frequency clock outputs for Ethernet, 10G Fibre Channel, and other networking applications.

Maxim’s proprietary PLL design features ultra-low jitter and excellent power-supply noise rejection, minimizing design risk for network equipment.

The MAX3625 has three LVPECL outputs. Selectable output dividers and a selectable feedback divider allow a range of output frequencies.

Crystal Oscillator Interface 24.8MHz to 27MHz

CMOS Input Up to 320MHz

Output Frequencies Ethernet 125MHz, 156.25MHz, 312.5MHz 10G Fibre Channel 159.375MHz, 318.75MHz

Low Jitter 0.14psRMS 1.875MHz to 20MHz 0.38psRMS 12kHz to 20MHz

Excellent Power-Supply Noise Rejection

No External Loop Filter Capacitor Required

Ethernet Networking Equipment Fibre Channel Storage Area Network

Pin Configuration and Typical Application Circuit appear at end of data sheet.

IN_SEL
Ordering Information

PART

TEMP RANGE PIN-PACKAGE

MAX3625CUG+ 0°C to +70°C 24 TSSOP +Denotes a lead-free package.

PKG CODE

U24-1

BYPASS

SELA[1:0]

Block Diagram

REF_IN
27pF X_IN

X_OUT 33pF

SELA[1:0] SELB[1:0]

FB_SEL BYPASS

RESET LOGIC/POR

RESET

LVCMOS 0
1 CRYSTAL OSCILLATOR

DIVIDERS M = 24, 25 NA = 1, 2, 4, 5 NB = 1, 2, 4, 5
620MHz TO 648MHz

FILTER

RESET

DIVIDER M

MAX3625

DIVIDER NA

RESET

LVPECL BUFFER

RESET

DIVIDER NB

LVPECL BUFFER

LVPECL BUFFER

QA_OE QA

QB1 QB_OE QB0

FB_SEL

SELB[1:0]

Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim’s website at

MAX3625

Low-Jitter, Precision Clock Generator with Three Outputs

ABSOLUTE MAXIMUM RATINGS

Supply Voltage Range VCC, VCCA, VCCO_A, VCCO_B to +4.0V

Voltage Range at REF_IN, IN_SEL, FB_SEL, SELA[1:0], SELB[1:0], QA_OE, QB_OE, MR, BYPASS ..............-0.3V to VCC + 0.3V

Voltage Range at X_IN Pin ...................................-0.3V to +1.2V

Voltage Range at X_OUT Pin ......................-0.3V to VCC - 0.6V Current into QA, QA, QB0, QB0, QB1, QB1 .....................-56mA

Continuous Power Dissipation TA = +70°C 24-Pin TSSOP derate 13.9mW/°C above +70°C .....1111mW

Operating Junction Temperature Range ...........-55°C to +150°C

Storage Temperature Range .............................-65°C to +160°C

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

VCC = +3.0V to +3.6V, TA = 0°C to +70°C, unless otherwise noted. Typical values are at VCC = +3.3V, TA = +25°C, unless otherwise noted. Notes 1, 2

PARAMETER

CONDITIONS

Power-Supply Current Note 3

IN_SEL = high ICC

IN_SEL = low

CONTROL INPUT CHARACTERISTICS SELA[1:0], SELB[1:0], FB_SEL, IN_SEL, QA_OE, QB_OE, MR, BYPASS Pins

Input Capacitance

Input Pulldown Resistor

RPULLDOWN Pins MR, FB_SEL

Input Logic Bias Resistor

RBIAS Pins SELA[1:0], SELB[1:0]

Input Pullup Resistor

RPULLUP Pins QA_OE, QB_OE, IN_SEL, BYPASS

LVPECL OUTPUTS QA, QA, QB0, QB0, QB1, QB1 Pins

Output High Voltage

Output Low Voltage

Peak-to-Peak Output-Voltage Swing Single-Ended

Note 2

Clock Output Rise/Fall Time
20% to 80% Note 2

Output Duty-Cycle Distortion

PLL enabled PLL bypassed Note 4

LVCMOS/LVTTL INPUTS SELA[1:0], SELB[1:0], FB_SEL, IN_SEL, QA_OE, QB_OE, MR, BYPASS Pins

Input-Voltage High Input-Voltage Low Input High Current Input Low Current

VIN = VCC

VIN = 0V

MIN TYP MAX UNITS

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Datasheet ID: MAX3625CUG+T 647308