MT41K1G4THV-125:M

MT41K1G4THV-125:M Datasheet

MT41K1G4 64 Meg x 4 x 8 Banks x 2 Ranks MT41K512M8 32 Meg x 8 x 8 Banks x 2 Ranks

Part	Datasheet
MT41K1G4THV-125:M	MT41K1G4THV-125:M (pdf)

Related Parts	Information
MT41K1G4THV-15E:M	MT41K1G4THV-15E:M
MT41K512M8THD-15E:D	MT41K512M8THD-15E:D
MT41K1G4THD-15E:D	MT41K1G4THD-15E:D
MT41K1G4THD-187E:D	MT41K1G4THD-187E:D

PDF Datasheet Preview
4Gb x4, x8 1.35V TwinDie DDR3L SDRAM Features TwinDie DDR3L SDRAM MT41K1G4 64 Meg x 4 x 8 Banks x 2 Ranks MT41K512M8 32 Meg x 8 x 8 Banks x 2 Ranks • Uses 2Gb Micron die • Two ranks includes dual CS#, ODT, CKE, and ZQ balls • Each rank has eight internal banks for concurrent operation • VDD = VDDQ = +1.35V 1.283V to 1.45V , backward compatible to VDD = VDDQ = +1.5V ±0.075V • 1.35V center-terminated push/pull I/O • JEDEC-standard ball-out • Low-profile package • TC of 0°C to 95°C 0°C to 85°C 8192 refresh cycles in 64ms 85°C to 95°C 8192 refresh cycles in 32ms Description The 4Gb TwinDie DDR3L SDRAM 1.35V uses Micron’s 2Gb DDR3L SDRAM die essentially two ranks of the 2Gb DDR3L SDRAM . Refer to Micron’s 2Gb DDR3L SDRAM data sheet for the specifications not included in this document. Specifications for base part number MT41K512M4 correlate to TwinDie manufacturing part number MT41K1G4 specifications for base part number MT41K256M8 correlate to TwinDie manufacturing part number MT41K512M8. Options • Configuration 64 Meg x 4 x 8 banks x 2 ranks 32 Meg x 8 x 8 banks x 2 ranks • FBGA package Pb-free 78-ball FBGA 9mm x 11.5mm x 1.2mm 78-ball FBGA 8mm x 11.5mm x 1.2mm • Timing cycle time1 1.25ns CL = 11 DDR3L-1600 1.5ns CL = 9 DDR3L-1333 1.87ns CL = 7 DDR3L-1066 • Self refresh Standard • Operating temperature Commercial 0°C TC 95°C Note CL = CAS READ latency. Marking 1G4 512M8 -125 -15E -187E None None :D/:M Table 1 Key Timing Parameters Speed Grade -125 -15E -187E Data Rate MT/s 1600 1333 1066 Target tRCD-tRP-CL 11-11-11 9-9-9 7-7-7 tRCD ns tRP ns tCL ns Micron Technology, Inc. reserves the right to change products or specifications without notice. 2010 Micron Technology, Inc. All rights reserved. and specifications discussed herein are for evaluation and reference purposes only and are subject to change by Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications. Table 2 Addressing Parameter Configuration Refresh count Row address Bank address Column address 4Gb x4, x8 1.35V TwinDie DDR3L SDRAM Features 1024 Meg x 4 64 Meg x 4 x 8 banks x 2 ranks 8K 32K A[14:0] 8 BA[2:0] 2K A[11, 9:0] 512 Meg x 8 32 Meg x 8 x 8 banks x 2 ranks 8K 32K A[14:0] 8 BA[2:0] 1K A[9:0]

PDF Datasheet Preview

4Gb x4, x8 1.35V TwinDie DDR3L SDRAM Features

TwinDie DDR3L SDRAM

MT41K1G4 64 Meg x 4 x 8 Banks x 2 Ranks MT41K512M8 32 Meg x 8 x 8 Banks x 2 Ranks
• Uses 2Gb Micron die
• Two ranks includes dual CS#, ODT, CKE, and ZQ
balls
• Each rank has eight internal banks for concurrent
operation
• VDD = VDDQ = +1.35V 1.283V to 1.45V , backward
compatible to VDD = VDDQ = +1.5V ±0.075V
• 1.35V center-terminated push/pull I/O
• JEDEC-standard ball-out
• Low-profile package
• TC of 0°C to 95°C
0°C to 85°C 8192 refresh cycles in 64ms 85°C to 95°C 8192 refresh cycles in 32ms

Description The 4Gb TwinDie DDR3L SDRAM 1.35V uses Micron’s 2Gb DDR3L SDRAM die essentially two ranks of the 2Gb DDR3L SDRAM . Refer to Micron’s 2Gb DDR3L SDRAM data sheet for the specifications not included in this document. Specifications for base part number MT41K512M4 correlate to TwinDie manufacturing part number MT41K1G4 specifications for base part number MT41K256M8 correlate to TwinDie manufacturing part number MT41K512M8.

Options
• Configuration 64 Meg x 4 x 8 banks x 2 ranks 32 Meg x 8 x 8 banks x 2 ranks
• FBGA package Pb-free 78-ball FBGA 9mm x 11.5mm x 1.2mm 78-ball FBGA 8mm x 11.5mm x 1.2mm
• Timing cycle time1 1.25ns CL = 11 DDR3L-1600 1.5ns CL = 9 DDR3L-1333 1.87ns CL = 7 DDR3L-1066
• Self refresh Standard
• Operating temperature Commercial 0°C TC 95°C

Note CL = CAS READ latency.

Marking
1G4 512M8
-125 -15E -187E

None

None :D/:M

Table 1 Key Timing Parameters

Speed Grade
-125 -15E -187E

Data Rate MT/s 1600 1333 1066

Target tRCD-tRP-CL 11-11-11 9-9-9 7-7-7
tRCD ns
tRP ns
tCL ns

Micron Technology, Inc. reserves the right to change products or specifications without notice. 2010 Micron Technology, Inc. All rights reserved.
and specifications discussed herein are for evaluation and reference purposes only and are subject to change by

Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications.

Table 2 Addressing

Parameter Configuration Refresh count Row address Bank address Column address
4Gb x4, x8 1.35V TwinDie DDR3L SDRAM Features
1024 Meg x 4 64 Meg x 4 x 8 banks x 2 ranks
8K 32K A[14:0]
8 BA[2:0] 2K A[11, 9:0]
512 Meg x 8 32 Meg x 8 x 8 banks x 2 ranks
8K 32K A[14:0]
8 BA[2:0] 1K A[9:0]

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MT41K1G4THV-125:M Datasheet file may be downloaded here without warranties.

Datasheet ID: MT41K1G4THV-125:M 648391