M45PE80-VMP6TG TR

M45PE80-VMP6TG TR Datasheet

M45PE80

Part	Datasheet
M45PE80-VMP6TG TR	M45PE80-VMP6TG TR (pdf)

Related Parts	Information
M45PE80-VMW6G	M45PE80-VMW6G
M45PE80-VMP6	M45PE80-VMP6
M45PE80-VMP6G	M45PE80-VMP6G
M45PE80-VMW6TG TR	M45PE80-VMW6TG TR

PDF Datasheet Preview
M45PE80 8 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability and a 75 MHz SPI bus interface - SPI bus compatible serial interface - 75 MHz clock rate maximum - V to V single supply voltage - 8 Mbit of Page-Erasable Flash memory - Page size 256 bytes: Page Write in 11 ms typical Page Program in ms typical Page Erase in 10 ms typical - Sector Erase 64 Kbytes - Hardware Write protection of the bottom sector 64 Kbytes - Electronic signature JEDEC standard two-byte signature 4014h - Unique ID code UID with 16 bytes read only, available upon customer request only on T9HX process technology parts - Deep Power-down mode 1 uA typical - More than 100 000 Write cycles - More than 20 years’ data retention - Packages RoHS compliant VFQFPN8 MP 6 x 5 mm MLP8 SO8W MW 208 mils width SO8N MN 150 mils width QFN8L MS MLP8 6 x 5 mm December 2008 1/48 Contents Contents M45PE80 Summary description 6 Signal description 8 Serial Data Output Q 8 Serial Data Input D 8 Serial Clock C 8 Chip Select S 8 Reset 8 Write Protect W 8 VCC supply voltage 9 VSS ground 9 SPI modes 10 Operating features 12 Sharing the overhead of modifying data 12 An easy way to modify data 12 A fast way to modify data 13 Polling during a Write, Program or Erase cycle 13 Reset 13 Active Power, Stand-by Power and Deep Power-Down modes 13 Status Register 14 Protection modes 14 Memory organization 15 Instructions 17 Write Enable WREN 18 Write Disable WRDI 18 Read Identification RDID 19 Read Status Register RDSR 20 WIP bit 20 4/48 M45PE80 List of figures List of figures Figure Figure Figure Logic diagram 6 VFQFPN and SO connections 7 Bus master and memory devices on the SPI bus 10 SPI modes supported 11 Block diagram 16 Write Enable WREN instruction sequence 18 Write Disable WRDI instruction sequence 18 Read Identification RDID instruction sequence and data-out sequence 20 Read Status Register RDSR instruction sequence and data-out sequence 21 Read Data Bytes READ instruction sequence and data-out sequence 22 Read Data Bytes at Higher Speed FAST_READ instruction sequence and data-out sequence 23 Page Write PW instruction sequence 24 Page Program PP instruction sequence 26 Page Erase PE instruction sequence 27 Sector Erase SE instruction sequence 28 Deep Power-down DP instruction sequence 29 Release from Deep Power-down RDP instruction sequence 30 Power-up timing 32 AC measurement I/O waveform 34 Serial input timing 39 Write Protect setup and hold timing 39 Output timing 39 Reset ac waveforms 40 VFQFPN8 MLP8 8-lead Very thin Fine Pitch Quad Flat Package No lead, 6 x 5 mm, package outline 41 SO8 wide 8 lead Plastic Small Outline, 208 mils body width, package outline 42 SO8N - 8 lead Plastic Small Outline, 150 mils body width, package outline 43 QFN8L MLP8 8-lead, dual flat package no lead, 6 x 5 mm, package outline 44 5/48 Summary description Summary description M45PE80 The M45PE80 is a 8 Mbit 1 Mbit x 8 bit Serial Paged Flash Memory accessed by a high speed SPI-compatible bus. The memory can be written or programmed 1 to 256 bytes at a time, using the Page Write or Page Program instruction. The Page Write instruction consists of an integrated Page Erase cycle followed by a Page Program cycle. The memory is organized as 16 sectors, each containing 256 pages. Each page is 256 bytes wide. Thus, the whole memory can be viewed as consisting of 4096 pages, or 1 048 576 bytes. The memory can be erased a page at a time, using the Page Erase instruction, or a sector at a time, using the Sector Erase instruction. In order to meet environmental requirements, Numonyx offers the M45PE80 in RoHS compliant packages, which are also Lead-free. Figure Logic diagram D C S W Reset Q M45PE80 Table Signal names Signal name Function C D Q S W Reset VCC VSS Serial Clock Serial Data Input Serial Data Output Chip Select Write Protect Reset Supply Voltage Ground AI06810B Direction Input Output Input 6/48 M45PE80 Figure VFQFPN and SO connections M45PE80 D1 C2 Reset 3 S4 7 VSS 6 VCC 5W AI06811B Summary description There is an exposed central pad on the underside of the VFQFPN package. This is pulled, internally, to VSS, and must not be allowed to be connected to any other voltage or signal line on the PCB. See Section 11 Package mechanical for package dimensions, and how to identify pin-1. 7/48 Signal description Signal description M45PE80 Table Ordering information scheme Example: M45PE80 Device Type M45PE = Page-Erasable Serial Flash Memory Device Function 80 = 8 Mbit 1 Mbit x 8 Operating Voltage V = VCC = to 3.6V Package MW = SO8W 208 mils width MP = VFQFPN8 6 x 5 mm MLP8 MN = SO8N 150 mils width MS = QFN 8L 6 x 5 mm, pitch1.2 mm Device Grade 6 = Industrial temperature range, to 85 °C. Device tested with standard test flow Option blank = Standard Packing T = Tape & Reel Packing Plating Technology P or G = RoHS compliant V MP 6 T G For a list of available options speed, package, etc. or for further information on any aspect of this device, please contact your nearest Numonyx Sales Office. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. 45/48 Reference 13 Reference - AN1995 Serial Flash Memory Device Marking. M45PE80 Version Changes 10-Feb-2003 02-Apr-2003 08-Apr-2003 05-May-2003 04-Jun-2003 26-Nov-2003 23-Jan-2004 28-May-2004 10-May-2005 4-Oct-2005 14-Feb-2006 Document written VFQFPN8 MLP package added Document promoted to Product Preview Document promoted to Preliminary Data 05-May-2003 corrected. VIO min extended to and tPP typ improved to 1.2ms. Table of contents, SO16 package, warning about exposed paddle on MLP8, and Pb-free options added. Change of naming for VDFPN8 package. Document promoted to full datasheet SO16 pin-out corrected Soldering temperature information clarified for RoHS compliant devices. Device Grade clarified SO16 wide package replaced by SO8 wide package. Active Power, Stand-by Power and Deep Power-Down modes, Read Identification RDID , Deep Power-down DP , and Release from Deep Power-down RDP descriptions updated. Table 21 Ordering information scheme updated. Figure 22 Output timing updated. Added Table 12 AC characteristics 33 MHz operation . An easy way to modify data, A fast way to modify data, Page Write PW and Page Program PP sections updated to explain optimal use of Page Write and Page Program instructions. Updated ICC3 values in Table 11 DC characteristics. Updated Table 21 Ordering information scheme RoHS information added. X process technology added see Section Reset , Table 14 Reset timings for U process technology devices and Table 15 Reset timings for X process technology devices . MLP package renamed as VFQFPN8, MLP silhouette modified on page TLEAD removed from Table 7 Absolute maximum ratings. Table 5 Status Register Format moved from Section Status Register to Section Read Status Register RDSR . Blank option removed under Plating Technology in Table 21 Ordering information scheme. 46/48 M45PE80 Version Changes 15-Dec-2006 50 MHz frequency added, Table 13 AC characteristics 50 MHz operation added. Small text changes. Section Reset updated. VCC supply voltage and VSS ground descriptions added. Figure 3 Bus master and memory devices on the SPI bus modified and explanatory text added. Behavior of WIP bit specified at Power-up in Section 7 Power-up and Power-down. VIO max modified and TLEAD added in Table 7 Absolute maximum ratings. Table 15 Reset conditions and Table 16 Timings after a Reset Low pulse updated. SO8N package added T9HX technology only , SO8W and VFQFPN8 package specifications updated see Section 11 Package mechanical . 10-Dec-2007 11-Nov-2008 12-Dec-2008 9 Applied Numonyx branding. Added frequency up to 75 MHz frequency, including Table AC characteristics 75 MHz operation Added new package, including Figure QFN8L MLP8 8-lead, dual 10 flat package no lead, 6 x 5 mm, package outline and Table QFN8L MLP8 8-lead dual flat package no lead, 6 x 5 mm package mechanical data; Added UID/CFD protection. Added the “UID columns” to Table Read Identification RDID data-out 11 sequence. 47/48 M45PE80 Please Read Carefully INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Numonyx may make changes to specifications and product descriptions at any time, without notice. Numonyx, B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting Numonyx's website at Numonyx StrataFlash is a trademark or registered trademark of Numonyx or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright 2008, Numonyx, B.V., All Rights Reserved. 48/48

PDF Datasheet Preview

M45PE80
8 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability and a 75 MHz SPI bus interface
- SPI bus compatible serial interface - 75 MHz clock rate maximum - V to V single supply voltage - 8 Mbit of Page-Erasable Flash memory - Page size 256 bytes:

Page Write in 11 ms typical Page Program in ms typical Page Erase in 10 ms typical - Sector Erase 64 Kbytes - Hardware Write protection of the bottom sector 64 Kbytes - Electronic signature JEDEC standard two-byte signature
4014h - Unique ID code UID with 16 bytes read only,
available upon customer request only on T9HX process technology parts - Deep Power-down mode 1 uA typical - More than 100 000 Write cycles - More than 20 years’ data retention - Packages RoHS compliant

VFQFPN8 MP 6 x 5 mm MLP8

SO8W MW 208 mils width

SO8N MN 150 mils width

QFN8L MS MLP8 6 x 5 mm

December 2008
1/48

Contents

Contents

M45PE80

Summary description 6

Signal description 8

Serial Data Output Q 8

Serial Data Input D 8

Serial Clock C 8

Chip Select S 8

Reset 8

Write Protect W 8

VCC supply voltage 9 VSS ground 9

SPI modes 10

Operating features 12

Sharing the overhead of modifying data 12

An easy way to modify data 12

A fast way to modify data 13

Polling during a Write, Program or Erase cycle 13

Reset 13

Active Power, Stand-by Power and Deep Power-Down modes 13

Status Register 14

Protection modes 14

Memory organization 15

Instructions 17

Write Enable WREN 18

Write Disable WRDI 18

Read Identification RDID 19

Read Status Register RDSR 20

WIP bit 20
4/48

M45PE80

List of figures

List of figures

Figure

Figure

Figure

Logic diagram 6 VFQFPN and SO connections 7 Bus master and memory devices on the SPI bus 10 SPI modes supported 11 Block diagram 16 Write Enable WREN instruction sequence 18 Write Disable WRDI instruction sequence 18 Read Identification RDID instruction sequence and data-out sequence 20 Read Status Register RDSR instruction sequence and data-out sequence 21 Read Data Bytes READ instruction sequence and data-out sequence 22 Read Data Bytes at Higher Speed FAST_READ instruction sequence and data-out sequence 23 Page Write PW instruction sequence 24 Page Program PP instruction sequence 26 Page Erase PE instruction sequence 27 Sector Erase SE instruction sequence 28 Deep Power-down DP instruction sequence 29 Release from Deep Power-down RDP instruction sequence 30 Power-up timing 32 AC measurement I/O waveform 34 Serial input timing 39 Write Protect setup and hold timing 39 Output timing 39 Reset ac waveforms 40 VFQFPN8 MLP8 8-lead Very thin Fine Pitch Quad Flat Package No lead, 6 x 5 mm, package outline 41 SO8 wide 8 lead Plastic Small Outline, 208 mils body width, package outline 42 SO8N - 8 lead Plastic Small Outline, 150 mils body width, package outline 43 QFN8L MLP8 8-lead, dual flat package no lead, 6 x 5 mm, package outline 44
5/48

Summary description

Summary description

M45PE80

The M45PE80 is a 8 Mbit 1 Mbit x 8 bit Serial Paged Flash Memory accessed by a high speed SPI-compatible bus.

The memory can be written or programmed 1 to 256 bytes at a time, using the Page Write or Page Program instruction. The Page Write instruction consists of an integrated Page Erase cycle followed by a Page Program cycle.

The memory is organized as 16 sectors, each containing 256 pages. Each page is 256 bytes wide. Thus, the whole memory can be viewed as consisting of 4096 pages, or 1 048 576 bytes.

The memory can be erased a page at a time, using the Page Erase instruction, or a sector at a time, using the Sector Erase instruction.

In order to meet environmental requirements, Numonyx offers the M45PE80 in RoHS compliant packages, which are also Lead-free.

Figure Logic diagram

D C S W Reset

Q M45PE80

Table Signal names

Signal name

Function

C D Q S W Reset VCC VSS

Serial Clock Serial Data Input Serial Data Output Chip Select Write Protect Reset Supply Voltage Ground

AI06810B

Direction Input Output Input
6/48

M45PE80

Figure VFQFPN and SO connections

M45PE80

D1 C2 Reset 3 S4
7 VSS 6 VCC 5W

AI06811B

Summary description

There is an exposed central pad on the underside of the VFQFPN package. This is pulled, internally, to VSS, and must not be allowed to be connected to any other voltage or signal line on the PCB.

See Section 11 Package mechanical for package dimensions, and how to identify pin-1.
7/48

Signal description

Signal description

M45PE80
Table Ordering information scheme

Example:

M45PE80

Device Type M45PE = Page-Erasable Serial Flash Memory

Device Function 80 = 8 Mbit 1 Mbit x 8

Operating Voltage V = VCC = to 3.6V

Package MW = SO8W 208 mils width MP = VFQFPN8 6 x 5 mm MLP8 MN = SO8N 150 mils width MS = QFN 8L 6 x 5 mm, pitch1.2 mm

Device Grade 6 = Industrial temperature range, to 85 °C. Device tested with standard test flow

Option blank = Standard Packing T = Tape & Reel Packing

Plating Technology P or G = RoHS compliant

V MP 6 T G

For a list of available options speed, package, etc. or for further information on any aspect of this device, please contact your nearest Numonyx Sales Office.

The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.
45/48

Reference
13 Reference
- AN1995 Serial Flash Memory Device Marking.

M45PE80

Version

Changes
10-Feb-2003 02-Apr-2003 08-Apr-2003 05-May-2003 04-Jun-2003 26-Nov-2003 23-Jan-2004 28-May-2004
10-May-2005
4-Oct-2005
14-Feb-2006

Document written

VFQFPN8 MLP package added

Document promoted to Product Preview

Document promoted to Preliminary Data
05-May-2003 corrected.

VIO min extended to and tPP typ improved to 1.2ms. Table of contents, SO16 package, warning about exposed paddle on MLP8, and Pb-free options added. Change of naming for VDFPN8 package.

Document promoted to full datasheet

SO16 pin-out corrected

Soldering temperature information clarified for RoHS compliant devices.

Device Grade clarified
SO16 wide package replaced by SO8 wide package. Active Power, Stand-by Power and Deep Power-Down modes, Read Identification RDID , Deep Power-down DP , and Release from Deep Power-down RDP descriptions updated. Table 21 Ordering information scheme updated. Figure 22 Output timing updated.
Added Table 12 AC characteristics 33 MHz operation . An easy way to modify data, A fast way to modify data, Page Write PW and Page Program PP sections updated to explain optimal use of Page Write and Page Program instructions. Updated ICC3 values in Table 11 DC characteristics. Updated Table 21 Ordering information scheme RoHS
information added.

X process technology added see Section Reset , Table 14 Reset timings for U process technology devices and Table 15 Reset
timings for X process technology devices . MLP package renamed as

VFQFPN8, MLP silhouette modified on page TLEAD removed from Table 7 Absolute maximum ratings.

Table 5 Status Register Format moved from Section Status Register
to Section Read Status Register RDSR . Blank option removed under Plating Technology in Table 21 Ordering information scheme.
46/48

M45PE80

Version

Changes
15-Dec-2006
50 MHz frequency added, Table 13 AC characteristics 50 MHz operation added. Small text changes.

Section Reset updated. VCC supply voltage and VSS ground descriptions added.

Figure 3 Bus master and memory devices on the SPI bus modified and
explanatory text added.

Behavior of WIP bit specified at Power-up in Section 7 Power-up and

Power-down.

VIO max modified and TLEAD added in Table 7 Absolute maximum ratings.

Table 15 Reset conditions and Table 16 Timings after a Reset Low pulse updated.

SO8N package added T9HX technology only , SO8W and VFQFPN8 package specifications updated see Section 11 Package mechanical .
10-Dec-2007 11-Nov-2008 12-Dec-2008
9 Applied Numonyx branding.

Added frequency up to 75 MHz frequency, including Table AC characteristics 75 MHz operation Added new package, including Figure QFN8L MLP8 8-lead, dual 10 flat package no lead, 6 x 5 mm, package outline and Table QFN8L MLP8 8-lead dual flat package no lead, 6 x 5 mm package mechanical data;

Added UID/CFD protection.

Added the “UID columns” to Table Read Identification RDID data-out 11 sequence.
47/48

M45PE80

Please Read Carefully INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY

WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.

Numonyx may make changes to specifications and product descriptions at any time, without notice. Numonyx, B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied,
by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by
visiting Numonyx's website at Numonyx StrataFlash is a trademark or registered trademark of Numonyx or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others. Copyright 2008, Numonyx, B.V., All Rights Reserved.
48/48

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Datasheet ID: M45PE80-VMP6TGTR 648298