M28W640FCB70ZB6E

M28W640FCB70ZB6E Datasheet

M28W640FCT M28W640FCB

Part	Datasheet
M28W640FCB70ZB6E	M28W640FCB70ZB6E (pdf)

Related Parts	Information
M28W640FCB70N6F TR	M28W640FCB70N6F TR
M28W640FCB70ZB6F TR	M28W640FCB70ZB6F TR
M28W640FCT70N6E	M28W640FCT70N6E
M28W640FCT70ZB6E	M28W640FCT70ZB6E
M28W640FCT70N6F TR	M28W640FCT70N6F TR

PDF Datasheet Preview
M28W640FCT M28W640FCB 64 Mbit 4Mbx16, Boot Block 3V Supply Flash memory Feature summary • Supply voltage VDD = 2.7V to 3.6V Core Power Supply VDDQ= 1.65V to 3.6V for Input/Output VPP = 12V for fast Program optional • Access times 70, 85, 90,100ns • Programming time: 10µs typical Double Word Programming Option Quadruple Word Programming Option • Common Flash Interface • Memory blocks Parameter Blocks Top or Bottom location Main Blocks • Block locking All blocks locked at Power Up Any combination of blocks can be locked WP for Block Lock-Down • Security 128 bit user Programmable OTP cells 64 bit unique device identifier • Automatic standby mode • Program and Erase Suspend • 100,000 program/erase cycles per block • Electronic signature Manufacturer code 20h Top device code, M28W640FCT 8848h Bottom device code, M28W640FCB 8849h FBGA TFBGA48 ZB x 10.5mm TSOP48 N 12 x 20mm • Packages compliant March 2008 1/77 Contents Contents M28W640FCT, M28W640FCB Summary description 7 Signal descriptions 12 Address inputs A0-A21 12 Data Input/Output DQ0-DQ15 12 Chip Enable E 12 Output Enable G 12 Write Enable W 12 Write Protect WP 12 Reset RP 13 VDD supply voltage 13 VDDQ supply voltage 13 VPP Program supply voltage 13 VSS Ground 13 Bus operations 14 Read 14 Write 14 Output Disable 14 Standby 14 Automatic Standby 15 Reset 15 Command interface 16 Read Memory Array command 16 Read Status Register command 16 Read electronic signature command 16 Read CFI Query command 17 Block Erase command 18 Program command 18 Double Word Program command 19 Quadruple Word Program command 19 2/77 5/77 List of figures List of figures M28W640FCT, M28W640FCB Figure Logic diagram 8 TSOP connections 9 TFBGA connections top view through package 10 Block addresses 11 Protection Register memory map 11 AC measurement I/O waveform 34 AC measurement load circuit 35 Read AC waveforms 38 Write AC waveforms, Write enable controlled 39 Write AC waveforms, Chip enable controlled 41 Power-Up and Reset AC waveforms 43 TSOP48 - 48 lead Plastic Thin Small Outline, 12 x 20mm, package outline 44 TFBGA48 6.39x10.5mm - 8x6 ball array, 0.75mm pitch, bottom view package outline 45 TFBGA48 daisy chain - package connections top view through package 46 TFBGA48 daisy chain - PCB connections proposal top view through package 47 Program flowchart and pseudo code 64 Double Word Program flowchart and pseudo code 65 Quadruple Word Program flowchart and pseudo code. 66 Program Suspend & Resume flowchart and pseudo code 67 Erase flowchart and pseudo code 68 Erase Suspend & Resume flowchart and pseudo code 69 Locking Operations flowchart and pseudo code 70 Protection Register Program flowchart and pseudo code 71 6/77 M28W640FCT, M28W640FCB Summary description Summary description The M28W640FCT and M28W640FCB are 64 Mbit 4 Mbit x 16 non-volatile Flash memories that can be erased electrically at block level and programmed in-system on a Word-by-Word basis using a 2.7V to 3.6V VDD supply for the circuitry and a 1.65V to 3.6V VDDQ supply for the Input/Output pins. An optional 12V VPP power supply is provided to speed up customer programming. The devices feature an asymmetrical blocked architecture. They have an array of 135 blocks 8 Parameter Blocks of 4 KWord and 127 Main Blocks of 32 KWord. The M28W640FCT has the Parameter Blocks at the top of the memory address space while the M28W640FCB locates the Parameter Blocks starting from the bottom. The memory maps are shown in Figure 4 Block addresses. The M28W640FCT and M28W640FCB feature an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency, enabling instant code and data protection. All blocks have three levels of protection. They can be locked and lockeddown individually preventing any accidental programming or erasure. There is an additional hardware protection against program and erase. When VPP all blocks are protected against program or erase. All blocks are locked at Power Up. Each block can be erased separately. Erase can be suspended in order to perform either read or program in any other block and then resumed. Program can be suspended to read data in any other block and then resumed. Each block can be programmed and erased over 100,000 cycles. The device includes a 192 bit Protection Register to increase the protection of a system design. The Protection Register is divided into a 64 bit segment and a 128 bit segment. The 64 bit segment contains a unique device number written by Numonyx, while the second one is one-time-programmable by the user. The user programmable segment can be permanently protected. Figure 5, shows the Protection Register Memory Map. Program and Erase commands are written to the Command Interface of the memory. An onchip Program/Erase Controller takes care of the timings necessary for program and erase operations. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards. The memory is offered in TSOP48 12 x 20mm and TFBGA48 x 10.5mm, 0.75mm pitch packages and is supplied with all the bits erased set to In order to meet environmental requirements, Numonyx offers the M28W640FCT and M28W640FCB in packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label. 7/77 Summary description M28W640FCT, M28W640FCB Figure Logic diagram VDD VDDQ VPP 22 A0-A21 W E G RP WP DQ0-DQ15 M28W640FCT M28W640FCB AI09903 Table Signal names A0-A21 Address Inputs DQ0-DQ15 Data Input/Output Chip Enable Output Enable Write Enable Reset Write Protect VDD VDDQ VPP VSS NC Core Power supply Power supply for Input/Output Optional supply voltage for Fast Program & Erase Ground Not Connected Internally 8/77 Table Ordering information scheme Example: Device type M28 Operating voltage W = VDD = 2.7V to 3.6V VDDQ = 1.65V to 3.6V Device function 640FC = 64 Mbit 4 Mb x16 , Boot Block Array matrix T = Top Boot B = Bottom Boot Speed 70 = 70ns 85 = 85ns 90 = 90ns 10 = 100ns Package N = TSOP48 12 x 20 mm ZB = TFBGA48 x 10.5mm, mm pitch Temperature range 1 = 0 to 70 °C 6 = to 85 °C Option E = Package, Standard Packing F = Package, Tape & Reel Packing M28W640FCT, M28W640FCB M28W640FCT 90 N 6 E 48/77 M28W640FCT, M28W640FCB Part numbering Table Daisy Chain ordering scheme Example: M28W640FC -ZB T Device type M28W640FC Daisy chain -ZB = TFBGA48 x 10.5mm, mm pitch Option E = Package, Standard Packing F = Package, Tape & Reel Packing, 24mm Devices are shipped from the factory with the memory content bits erased to For a list of available options Speed, Package, etc. or for further information on any aspect of this device, please contact the Numonyx Sales Office nearest to you. 49/77 Block address tables Appendix A Block address tables M28W640FCT, M28W640FCB Table Top Boot Block Addresses, M28W640FCT Size KWord Address range 3FE000-3FEFFF 3FD000-3FDFFF 3FC000-3FCFFF 3FB000-3FBFFF 3FA000-3FAFFF 3F9000-3F9FFF 3F8000-3F8FFF 3F0000-3F7FFF 3E8000-3EFFFF 3E0000-3E7FFF 3D8000-3DFFFF 3D0000-3D7FFF 3C8000-3CFFFF 3C0000-3C7FFF 3B8000-3BFFFF 3B0000-3B7FFF 3A8000-3AFFFF 3A0000-3A7FFF 398000-39FFFF 390000-397FFF 388000-38FFFF 380000-387FFF 378000-37FFFF 370000-377FFF 368000-36FFFF 360000-367FFF 358000-35FFFF 350000-357FFF 348000-34FFFF 340000-347FFF The 0.13µm technology was removed from the device options of Table 22 Ordering information scheme. 26-Mar-2008 Applied Numonyx branding. 76/77 M28W640FCT, M28W640FCB Please Read Carefully INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications. Numonyx may make changes to specifications and product descriptions at any time, without notice. Numonyx, B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting Numonyx's website at Numonyx StrataFlash is a trademark or registered trademark of Numonyx or its subsidiaries in the United States and other countries. *Other names and brands may be claimed as the property of others. Copyright 11/5/7, Numonyx, B.V., All Rights Reserved. 77/77

PDF Datasheet Preview

M28W640FCT M28W640FCB
64 Mbit 4Mbx16, Boot Block 3V Supply Flash memory

Feature summary
• Supply voltage VDD = 2.7V to 3.6V Core Power Supply VDDQ= 1.65V to 3.6V for Input/Output VPP = 12V for fast Program optional
• Access times 70, 85, 90,100ns
• Programming time:
10µs typical Double Word Programming Option Quadruple Word Programming Option
• Common Flash Interface
• Memory blocks Parameter Blocks Top or Bottom location Main Blocks
• Block locking All blocks locked at Power Up Any combination of blocks can be locked WP for Block Lock-Down
• Security 128 bit user Programmable OTP cells 64 bit unique device identifier
• Automatic standby mode
• Program and Erase Suspend
• 100,000 program/erase cycles per block
• Electronic signature Manufacturer code 20h Top device code, M28W640FCT 8848h Bottom device code, M28W640FCB 8849h

FBGA

TFBGA48 ZB x 10.5mm

TSOP48 N 12 x 20mm
• Packages compliant

March 2008
1/77

Contents

Contents

M28W640FCT, M28W640FCB

Summary description 7

Signal descriptions 12

Address inputs A0-A21 12

Data Input/Output DQ0-DQ15 12

Chip Enable E 12

Output Enable G 12

Write Enable W 12

Write Protect WP 12

Reset RP 13

VDD supply voltage 13 VDDQ supply voltage 13 VPP Program supply voltage 13 VSS Ground 13

Bus operations 14

Read 14

Write 14

Output Disable 14

Standby 14

Automatic Standby 15

Reset 15

Command interface 16

Read Memory Array command 16

Read Status Register command 16

Read electronic signature command 16

Read CFI Query command 17

Block Erase command 18

Program command 18

Double Word Program command 19

Quadruple Word Program command 19
2/77
5/77

List of figures

List of figures

M28W640FCT, M28W640FCB

Figure

Logic diagram 8 TSOP connections 9 TFBGA connections top view through package 10 Block addresses 11 Protection Register memory map 11 AC measurement I/O waveform 34 AC measurement load circuit 35 Read AC waveforms 38 Write AC waveforms, Write enable controlled 39 Write AC waveforms, Chip enable controlled 41 Power-Up and Reset AC waveforms 43 TSOP48 - 48 lead Plastic Thin Small Outline, 12 x 20mm, package outline 44 TFBGA48 6.39x10.5mm - 8x6 ball array, 0.75mm pitch, bottom view package outline 45 TFBGA48 daisy chain - package connections top view through package 46 TFBGA48 daisy chain - PCB connections proposal top view through package 47 Program flowchart and pseudo code 64 Double Word Program flowchart and pseudo code 65 Quadruple Word Program flowchart and pseudo code. 66 Program Suspend & Resume flowchart and pseudo code 67 Erase flowchart and pseudo code 68 Erase Suspend & Resume flowchart and pseudo code 69 Locking Operations flowchart and pseudo code 70 Protection Register Program flowchart and pseudo code 71
6/77

M28W640FCT, M28W640FCB

Summary description

Summary description

The M28W640FCT and M28W640FCB are 64 Mbit 4 Mbit x 16 non-volatile Flash memories that can be erased electrically at block level and programmed in-system on a Word-by-Word basis using a 2.7V to 3.6V VDD supply for the circuitry and a 1.65V to 3.6V VDDQ supply for the Input/Output pins. An optional 12V VPP power supply is provided to speed up customer programming.

The devices feature an asymmetrical blocked architecture. They have an array of 135 blocks 8 Parameter Blocks of 4 KWord and 127 Main Blocks of 32 KWord. The M28W640FCT has the Parameter Blocks at the top of the memory address space while the M28W640FCB locates the Parameter Blocks starting from the bottom. The memory maps are shown in Figure 4 Block addresses.

The M28W640FCT and M28W640FCB feature an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency, enabling instant code and data protection. All blocks have three levels of protection. They can be locked and lockeddown individually preventing any accidental programming or erasure. There is an additional hardware protection against program and erase. When VPP all blocks are protected against program or erase. All blocks are locked at Power Up.

Each block can be erased separately. Erase can be suspended in order to perform either read or program in any other block and then resumed. Program can be suspended to read data in any other block and then resumed. Each block can be programmed and erased over 100,000 cycles.

The device includes a 192 bit Protection Register to increase the protection of a system design. The Protection Register is divided into a 64 bit segment and a 128 bit segment. The 64 bit segment contains a unique device number written by Numonyx, while the second one is one-time-programmable by the user. The user programmable segment can be permanently protected. Figure 5, shows the Protection Register Memory Map.

Program and Erase commands are written to the Command Interface of the memory. An onchip Program/Erase Controller takes care of the timings necessary for program and erase operations. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards.

The memory is offered in TSOP48 12 x 20mm and TFBGA48 x 10.5mm, 0.75mm pitch packages and is supplied with all the bits erased set to

In order to meet environmental requirements, Numonyx offers the M28W640FCT and M28W640FCB in packages. These packages have a Lead-free second level interconnect. The category of second Level Interconnect is marked on the package and on the inner box label, in compliance with JEDEC Standard JESD97. The maximum ratings related to soldering conditions are also marked on the inner box label.
7/77

Summary description

M28W640FCT, M28W640FCB

Figure Logic diagram

VDD VDDQ VPP
22 A0-A21

W E G RP WP

DQ0-DQ15

M28W640FCT M28W640FCB

AI09903

Table Signal names

A0-A21

Address Inputs

DQ0-DQ15

Data Input/Output

Chip Enable

Output Enable

Write Enable

Reset

Write Protect

VDD VDDQ VPP VSS NC

Core Power supply Power supply for Input/Output Optional supply voltage for Fast Program & Erase Ground Not Connected Internally
8/77
Table Ordering information scheme Example:

Device type M28

Operating voltage W = VDD = 2.7V to 3.6V VDDQ = 1.65V to 3.6V

Device function 640FC = 64 Mbit 4 Mb x16 , Boot Block

Array matrix T = Top Boot B = Bottom Boot

Speed 70 = 70ns 85 = 85ns 90 = 90ns 10 = 100ns

Package N = TSOP48 12 x 20 mm ZB = TFBGA48 x 10.5mm, mm pitch

Temperature range 1 = 0 to 70 °C 6 = to 85 °C

Option E = Package, Standard Packing F = Package, Tape & Reel Packing

M28W640FCT, M28W640FCB M28W640FCT 90 N 6 E
48/77

M28W640FCT, M28W640FCB

Part numbering
Table Daisy Chain ordering scheme

Example:

M28W640FC
-ZB T

Device type M28W640FC

Daisy chain -ZB = TFBGA48 x 10.5mm, mm pitch

Option

E = Package, Standard Packing

F = Package, Tape & Reel Packing, 24mm

Devices are shipped from the factory with the memory content bits erased to For a list of available options Speed, Package, etc. or for further information on any aspect of this device, please contact the Numonyx Sales Office nearest to you.
49/77

Block address tables

Appendix A Block address tables

M28W640FCT, M28W640FCB

Table Top Boot Block Addresses, M28W640FCT

Size KWord

Address range
3FE000-3FEFFF
3FD000-3FDFFF
3FC000-3FCFFF
3FB000-3FBFFF 3FA000-3FAFFF
3F9000-3F9FFF
3F8000-3F8FFF
3F0000-3F7FFF
3E8000-3EFFFF 3E0000-3E7FFF
3D8000-3DFFFF
3D0000-3D7FFF
3C8000-3CFFFF 3C0000-3C7FFF
3B8000-3BFFFF
3B0000-3B7FFF
3A8000-3AFFFF
3A0000-3A7FFF 398000-39FFFF
390000-397FFF
388000-38FFFF
380000-387FFF 378000-37FFFF
370000-377FFF
368000-36FFFF
360000-367FFF
358000-35FFFF 350000-357FFF
348000-34FFFF
340000-347FFF
The 0.13µm technology was removed from the device options of Table 22 Ordering information scheme.
26-Mar-2008

Applied Numonyx branding.
76/77

M28W640FCT, M28W640FCB

Please Read Carefully INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY

WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

Numonyx products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.

Numonyx may make changes to specifications and product descriptions at any time, without notice. Numonyx, B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied,
by estoppel or otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights. Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by
visiting Numonyx's website at Numonyx StrataFlash is a trademark or registered trademark of Numonyx or its subsidiaries in the United States and other countries.
*Other names and brands may be claimed as the property of others. Copyright 11/5/7, Numonyx, B.V., All Rights Reserved.
77/77

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Datasheet ID: M28W640FCB70ZB6E 648289