LPC47S457-NS

LPC47S457-NS Datasheet

LPC47S45x

Part	Datasheet
LPC47S457-NS	LPC47S457-NS (pdf)

PDF Datasheet Preview
LPC47S45x Advanced I/O with X-Bus Interface Volt Operation 5V tolerant Floppy Disk Controller Supports 2 FDCs Multi-Mode Parallel Port Two UARTs 8042 Keyboard Controller SMBus Controller - SMBus access to LCD Interface - SMBus Serial Port 2 Interface Disable - SMBus access to Power On Elapsed Time Counters - Programmable Slave Address X-Bus Interface - Supports up to four external I/O components - Offers two modes of operation - Support for Driving LCD Panel Interface Controller - Supports Port 80h Monitoring Programmable Wakeup Event Interface IO_PME# Pin SMI Support IO_SMI# Pin GPIOs 55 Fan Controller - One Fan Speed Control Output - One Fan Tachometer Input ISA IRQ to Serial IRQ Conversion XNOR Chain for Board Test Mode PC2001 and ACPI Compliant 128-pin QFP Package ISA Plug-and-Play Compatible Register Set Intelligent Auto Power Management Power On Elapsed Time Counters - Counter for Main Power - Counter for Standby Power Real Time Clock - MC146818 and DS1287 Compatible - 256 Bytes of Battery Backed CMOS in Two 128Byte Banks - 128 Bytes of CMOS RAM Lockable in 4x32 Byte Blocks - 12 and 24 Hour Time Format - 24-hour daily alarm - 30-day alarm - Binary and BCD Format - <1uA Standby Current typ 2.88MB Super I/O Floppy Disk Controller - Licensed CMOS 765B Floppy Disk Controller - Software and Register Compatible with SMSC's Proprietary 82077AA Compatible Core - Configurable Open Drain/Push-Pull Output Drivers - Supports Vertical Recording Format - 16-Byte Data FIFO - 100% IBM Compatibility - Detects All Overrun and Underrun Conditions - Sophisticated Power Control Circuitry PCC Including Multiple Powerdown Modes for Reduced Power Consumption - DMA Enable Logic - Data Rate and Drive Control Registers - 480 Address, up to 15 IRQ and Four DMA Options Enhanced Digital Data Separator - 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates - Programmable Precompensation Modes Keyboard Controller - 8042 Software Compatible - 8-Bit Microcomputer - 2k Bytes of Program ROM - 256 Bytes of Data RAM - Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface - Asynchronous Access to Two Data Registers and One Status Register - Supports Interrupt and Polling Access - 8-Bit Counter Timer - Port 92 Support - Fast Gate A20 and KRESET Outputs Serial Ports - Two Full Function Serial Ports - High Speed NS16C550A Compatible UARTs with Send/Receive 16-Byte FIFOs - Supports 230k and 460k Baud - Programmable Baud Rate Generator - Modem Control Circuitry - 480 Address and 15 IRQ Options - IrDA HP-SIR, ASK IR Support SMSC LPC47S45x DATASHEET Multi-Mode Parallel Port with ChiProtect - Standard Mode IBM PC/XT, PC/AT, and PS/2 Compatible Bi-directional Parallel Port - Enhanced Parallel Port EPP Compatible - EPP and EPP IEEE 1284 Compliant - IEEE 1284 Compliant Enhanced Capabilities Port ECP - ChiProtect Circuitry for Protection Against Damage Due to Printer Power-On - 960 Address, up to 15 IRQ and Four DMA Options Pin Reduced ISA Host Interface LPC Bus - Multiplexed Command, Address and Data Bus - 8-Bit I/O Transfers - 8-Bit DMA Transfers - 16-Bit Address Qualification - Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems - Power Management Event PME Interface Pin Power Management ACPI Registers ORDERING INFORMATION LPC47S457-NS for 128 pin QFP package with Phoenix 42i Keyboard BIOS Lead-Free RoHS Compliant LPC47S457-NC for 128 pin QFP package with Phoenix 42i Keyboard BIOS 80 ARKAY DRIVE, HAUPPAUGE, NY 11788 631 435-6000, FAX 631 273-3123 Copyright 2009 SMSC or its subsidiaries. All rights reserved. Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order the "Terms of Sale Agreement" . The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at SMSC is a registered trademark of Standard Microsystems Corporation “SMSC” . Product names and company names are the trademarks of their respective holders. SMSC LPC47S45x Page 2 of 259 DATASHEET TABLE OF CONTENTS 1 GENERAL DESCRIPTION 9 2 PIN CONFIGURATION 10 3 PINOUT 11 4 PIN DESCRIPTION 12 BUFFER TYPE DESCRIPTIONS PINS THAT REQUIRE EXTERNAL PULLUP 5 DESCRIPTION OF POWER SOURCES AND CLOCK 19 VOLT OPERATION / 5 VOLT TOLERANCE POWER FUNCTIONALITY VCC Power VTR Support Vbat Input INTERNAL KHZ TRICKLE CLOCK INDICATION OF 32KHZ CLOCK TRICKLE POWER FUNCTIONALITY 40MHZ CLOCK MAXIMUM CURRENT VALUES POWER MANAGEMENT EVENTS PME/SCI 6 FUNCTIONAL 24 SUPER I/O HOST PROCESSOR INTERFACE LPC INTERFACE LPC Interface Signal Power LPC Transfers FLOPPY DISK CONTROLLER FDC Internal Registers Status Register Encoding DMA Controller Phases Command Set/Descriptions Instruction Data Transfer Commands Control Direct Support for Two Floppy Drives SERIAL PORT UART Register Description Programmable Baud Rate Generator AND Divisor Latches DLH, DLL Effect Of The Reset on Register File FIFO Interrupt Mode Operation FIFO Polled Mode Notes On Serial Port Operation INFRARED IR Transmit Pin PARALLEL PORT IBM XT/AT Compatible, Bi-Directional And EPP Extended Capabilities Parallel ECP Implementation Standard SMSC LPC47S45x Page 3 of 259 DATASHEET Parallel Port Floppy Disk Controller POWER MANAGEMENT FDC Power Management UART Power Parallel Port REAL TIME CLOCK Configuration Registers Host I/O Internal Time Calendar and Update Cycle Control and Status Registers Interrupts 32kHz Clock Power SERIAL Timing Diagrams For SER_IRQ Cycle Routable IRQ To Serial IRQ Conversion Capability 8042 KEYBOARD CONTROLLER Keyboard External Keyboard and Mouse Interface Keyboard Power Interrupts Memory Configurations Register Definitions External Clock Signal Default Reset Conditions Latches On Keyboard and Mouse Keyboard and Mouse PME GENERAL PURPOSE GPIO Pins Description GPIO Operation GPIO PME and SMI Functionality Either Edge Triggered Interrupts LED Functionality WATCH DOG POWER ON ELAPSED TIMER VCC Power on Elapsed Time VTR Power on Elapsed Time Counter FAN SPEED CONTROL AND Fan Speed Control Fan Speed DEVICE DISABLE Device Disable Register LPC only SMBus2 Device Disable Register SMBus2 only SMBUS CONTROLLER Configuration Runtime SMBUS2 SLAVE SMBus Protocols supported by SMBus2 Command Codes X-Bus SMBus2/LPC SMBus2 Register Summary SMBus2 Register Description Invalid Command Protocol Response Behavior Slave Device Time-Out Stretching the SCLK SMBus Bus Reset Sequence X-BUS I/O Cycles Supported LCD Controllers SMSC LPC47S45x Page 4 of 259 DATASHEET 7 ACPI/PME/SMI FEATURES 147 POWER Global/System Sleep States Device Sleep States Wake Events ACPI SPECIFIC REGISTERS ACPI FEATURES Legacy/ACPI Power Button with Override RTC Alarm as a PME Event PME SUPPORT ‘Wake On Specific Key’ Option SYSTEM MANAGEMENT INTERRUPT SMI Registers ACPI Support Register for SMI Generation 8 RUNTIME REGISTERS 156 RUNTIME REGISTERS BLOCK RUNTIME REGISTERS BLOCK DESCRIPTION 9 CONFIGURATION 194 SYSTEM ELEMENTS CONFIGURATION SEQUENCE PROGRAMMING EXAMPLE CHIP LEVEL GLOBAL CONTROL/CONFIGURATION LOGICAL DEVICE CONFIGURATION/CONTROL REGISTERS [0X30-0XFF] 10 OPERATIONAL 224 MAXIMUM GUARANTEED DC ELECTRICAL CHARACTERISTICS 11 TIMING DIAGRAMS 228 POWER-UP TIMING INPUT CLOCK OUTPUT CLOCK TIMING LPC INTERFACE FLOPPY DISK PARALLEL PORT

PDF Datasheet Preview

LPC47S45x

Advanced I/O with X-Bus Interface

Volt Operation 5V tolerant

Floppy Disk Controller Supports 2 FDCs

Multi-Mode Parallel Port

Two UARTs
8042 Keyboard Controller

SMBus Controller - SMBus access to LCD Interface - SMBus Serial Port 2 Interface Disable - SMBus access to Power On Elapsed Time Counters - Programmable Slave Address

X-Bus Interface - Supports up to four external I/O components - Offers two modes of operation - Support for Driving LCD Panel Interface Controller - Supports Port 80h Monitoring

Programmable Wakeup Event Interface IO_PME# Pin

SMI Support IO_SMI# Pin

GPIOs 55

Fan Controller - One Fan Speed Control Output - One Fan Tachometer Input

ISA IRQ to Serial IRQ Conversion

XNOR Chain for Board Test Mode

PC2001 and ACPI Compliant
128-pin QFP Package

ISA Plug-and-Play Compatible Register Set

Intelligent Auto Power Management

Power On Elapsed Time Counters - Counter for Main Power - Counter for Standby Power

Real Time Clock - MC146818 and DS1287 Compatible - 256 Bytes of Battery Backed CMOS in Two 128Byte Banks - 128 Bytes of CMOS RAM Lockable in 4x32 Byte Blocks - 12 and 24 Hour Time Format - 24-hour daily alarm - 30-day alarm - Binary and BCD Format - <1uA Standby Current typ
2.88MB Super I/O Floppy Disk Controller - Licensed CMOS 765B Floppy Disk Controller - Software and Register Compatible with SMSC's Proprietary 82077AA Compatible Core - Configurable Open Drain/Push-Pull Output Drivers - Supports Vertical Recording Format - 16-Byte Data FIFO - 100% IBM Compatibility - Detects All Overrun and Underrun Conditions - Sophisticated Power Control Circuitry PCC Including Multiple Powerdown Modes for Reduced Power Consumption - DMA Enable Logic - Data Rate and Drive Control Registers - 480 Address, up to 15 IRQ and Four DMA Options

Enhanced Digital Data Separator - 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates - Programmable Precompensation Modes

Keyboard Controller - 8042 Software Compatible - 8-Bit Microcomputer - 2k Bytes of Program ROM - 256 Bytes of Data RAM - Four Open Drain Outputs Dedicated for Keyboard/Mouse Interface - Asynchronous Access to Two Data Registers and One Status Register - Supports Interrupt and Polling Access - 8-Bit Counter Timer - Port 92 Support - Fast Gate A20 and KRESET Outputs

Serial Ports - Two Full Function Serial Ports - High Speed NS16C550A Compatible UARTs with Send/Receive 16-Byte FIFOs - Supports 230k and 460k Baud - Programmable Baud Rate Generator - Modem Control Circuitry - 480 Address and 15 IRQ Options - IrDA HP-SIR, ASK IR Support

SMSC LPC47S45x

DATASHEET

Multi-Mode Parallel Port with ChiProtect - Standard Mode IBM PC/XT, PC/AT, and PS/2 Compatible Bi-directional Parallel Port - Enhanced Parallel Port EPP Compatible - EPP and EPP IEEE 1284 Compliant - IEEE 1284 Compliant Enhanced Capabilities Port ECP - ChiProtect Circuitry for Protection Against Damage Due to Printer Power-On - 960 Address, up to 15 IRQ and Four DMA Options

Pin Reduced ISA Host Interface LPC Bus - Multiplexed Command, Address and Data Bus - 8-Bit I/O Transfers - 8-Bit DMA Transfers - 16-Bit Address Qualification - Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems - Power Management Event PME Interface Pin

Power Management

ACPI Registers
ORDERING INFORMATION

LPC47S457-NS for 128 pin QFP package with Phoenix 42i Keyboard BIOS Lead-Free RoHS Compliant

LPC47S457-NC for 128 pin QFP package with Phoenix 42i Keyboard BIOS
80 ARKAY DRIVE, HAUPPAUGE, NY 11788 631 435-6000, FAX 631 273-3123

Copyright 2009 SMSC or its subsidiaries. All rights reserved.

Circuit diagrams and other information relating to SMSC products are included as a means of illustrating typical applications. Consequently, complete information sufficient for construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement dated before the date of your order the "Terms of Sale Agreement" . The product may contain design defects or errors known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at SMSC is a registered trademark of Standard Microsystems Corporation “SMSC” . Product names and company names are the trademarks of their respective holders.

SMSC LPC47S45x

Page 2 of 259

DATASHEET

TABLE OF CONTENTS
1 GENERAL DESCRIPTION 9
2 PIN CONFIGURATION 10
3 PINOUT 11
4 PIN DESCRIPTION 12

BUFFER TYPE DESCRIPTIONS PINS THAT REQUIRE EXTERNAL PULLUP
5 DESCRIPTION OF POWER SOURCES AND CLOCK 19

VOLT OPERATION / 5 VOLT TOLERANCE POWER FUNCTIONALITY

VCC Power VTR Support Vbat Input INTERNAL KHZ TRICKLE CLOCK INDICATION OF 32KHZ CLOCK TRICKLE POWER FUNCTIONALITY 40MHZ CLOCK MAXIMUM CURRENT VALUES POWER MANAGEMENT EVENTS PME/SCI
6 FUNCTIONAL 24

SUPER I/O HOST PROCESSOR INTERFACE LPC INTERFACE

LPC Interface Signal Power LPC Transfers FLOPPY DISK CONTROLLER FDC Internal Registers Status Register Encoding DMA Controller Phases Command Set/Descriptions Instruction Data Transfer Commands Control Direct Support for Two Floppy Drives SERIAL PORT UART Register Description Programmable Baud Rate Generator AND Divisor Latches DLH, DLL Effect Of The Reset on Register File FIFO Interrupt Mode Operation FIFO Polled Mode Notes On Serial Port Operation INFRARED IR Transmit Pin PARALLEL PORT IBM XT/AT Compatible, Bi-Directional And EPP Extended Capabilities Parallel ECP Implementation Standard

SMSC LPC47S45x

Page 3 of 259

DATASHEET

Parallel Port Floppy Disk Controller POWER MANAGEMENT

FDC Power Management UART Power Parallel Port REAL TIME CLOCK Configuration Registers Host I/O Internal Time Calendar and Update Cycle Control and Status Registers Interrupts 32kHz Clock Power SERIAL Timing Diagrams For SER_IRQ Cycle Routable IRQ To Serial IRQ Conversion Capability 8042 KEYBOARD CONTROLLER Keyboard External Keyboard and Mouse Interface Keyboard Power Interrupts Memory Configurations Register Definitions External Clock Signal Default Reset Conditions Latches On Keyboard and Mouse Keyboard and Mouse PME GENERAL PURPOSE GPIO Pins Description GPIO Operation GPIO PME and SMI Functionality Either Edge Triggered Interrupts LED Functionality WATCH DOG POWER ON ELAPSED TIMER VCC Power on Elapsed Time VTR Power on Elapsed Time Counter FAN SPEED CONTROL AND Fan Speed Control Fan Speed DEVICE DISABLE Device Disable Register LPC only SMBus2 Device Disable Register SMBus2 only SMBUS CONTROLLER Configuration Runtime SMBUS2 SLAVE SMBus Protocols supported by SMBus2 Command Codes X-Bus SMBus2/LPC SMBus2 Register Summary SMBus2 Register Description Invalid Command Protocol Response Behavior Slave Device Time-Out Stretching the SCLK SMBus Bus Reset Sequence X-BUS I/O Cycles Supported LCD Controllers

SMSC LPC47S45x

Page 4 of 259

DATASHEET
7 ACPI/PME/SMI FEATURES 147

POWER Global/System Sleep States Device Sleep States Wake Events

ACPI SPECIFIC REGISTERS ACPI FEATURES

Legacy/ACPI Power Button with Override RTC Alarm as a PME Event PME SUPPORT ‘Wake On Specific Key’ Option SYSTEM MANAGEMENT INTERRUPT SMI Registers ACPI Support Register for SMI Generation
8 RUNTIME REGISTERS 156

RUNTIME REGISTERS BLOCK RUNTIME REGISTERS BLOCK DESCRIPTION
9 CONFIGURATION 194

SYSTEM ELEMENTS CONFIGURATION SEQUENCE PROGRAMMING EXAMPLE CHIP LEVEL GLOBAL CONTROL/CONFIGURATION LOGICAL DEVICE CONFIGURATION/CONTROL REGISTERS [0X30-0XFF]
10 OPERATIONAL 224

MAXIMUM GUARANTEED DC ELECTRICAL CHARACTERISTICS
11 TIMING DIAGRAMS 228

POWER-UP TIMING INPUT CLOCK OUTPUT CLOCK TIMING LPC INTERFACE FLOPPY DISK PARALLEL PORT

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived LPC47S457-NS Datasheet file may be downloaded here without warranties.

Datasheet ID: LPC47S457-NS 648131