DSC2140 DSC2240
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DSC2140FI2-D0001 (pdf) |
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DSC2140 DSC2240 Low-Jitter I2C/SPI Programmable HCSL Oscillator Datasheet The DSC2140 and DSC2240 series of programmable, high-performance HCSL oscillators utilizes a proven silicon MEMS technology to provide excellent jitter and stability while incorporating high output frequency flexibility. DSC2140 and DSC2240 allow the user to modify the output frequency using I2C or SPI interface, respectively. User can also select from two pre-programmed default output frequencies using the control pin. DSC2140 and DSC2240 are packaged in 14pin 3.2x2.5 mm QFN packages and available in temperature grades from Ext. Commercial to Industrial. Block Diagram Low RMS Phase Jitter <1 ps typ High Stability ±10, ±25, ±50 ppm Wide Temperature Range o Industrial -40° to 85° C o Ext. commercial -20° to 70° C High Supply Noise Rejection -50 dBc I2C/SPI Programmable Output Freq Short Lead Times 2 Weeks Wide Freq. Range o HCSL Output to 460 MHz Miniature Footprint of 3.2x2.5mm Excellent Shock & Vibration Immunity o Qualified to MIL-STD-883 High Reliability o 20x better MTF than quartz oscillators Supply Range of to V Lead Free & RoHS Compliant Pin # 3 5 6 7 DSC2140 I2C NC SDA SCL CS_bar DSC2240 SPI SCLK MOSI MISO SS Consumer Electronics Storage Area Networks o SATA, SAS, Fibre Channel Passive Optical Networks o EPON, 10G-EPON, GPON, 10G-PON Ethernet o 1G, 10GBASE-T/KR/LR/SR, and FCoE HD/SD/SDI Video & Surveillance PCI Express DSC2140 DSC2240 MK-Q-B-P-D-12050110 DSC2140 DSC2240 Low-Jitter I2C/SPI Programmable HCSL Oscillator Pin Description Pin No. 1 2 8 9 10 11 12 13 14 Pin Name Enable NC SCLK GND SDA MOSI SCL MISO CS_bar SS Output1+ Output1- NC VDD2 VDD FS Pin Type I NA I Power I I O I O NA Power I Enables outputs when high and disables when low Leave unconnected or grounded DSC2140 Leave unconnected or grounded DSC2240 Serial clock from master Ground DSC2140 I2C Serial Data DSC2240 SPI Serial Data from Master to Slave DSC2140 I2C Serial Clock DSC2240 SPI Serial Data from Slave to Master DSC2140 I2C Chip Select Active Low DSC2240 SPI Slave Select Active Low Positive HCSL Output Negative HCSL Output Leave unconnected or grounded Leave unconnected or grounded Power Supply Power Supply Default output clock frequency bit Operational Description The DSC2140/2240 is a HCSL oscillator consisting of a MEMS resonator and a support PLL IC. The HCSL output is generated through independent 8-bit programmable dividers from the output of the internal PLL. DSC2140/2240 allows for easy programming of the output frequencies using I2C/SPI interface. Upon power-up, the initial output frequency is controlled by an internal preprogrammed memory OTP . This memory stores all coefficients required by the PLL for two different default frequencies. The control pin FS selects the initial frequency. Once the device is powered up, a new output frequency can be programmed. Programming details are provided in the Programming Guide. Standard default frequencies are described in the following sections. Discera supports customer defined versions of the DSC2140/2240. When Enable pin 1 is floated or connected to VDD, the DSC2140/2240 is in operational mode. Driving Enable to ground will disable both output drivers hi-impedance mode . Output Clock Frequencies Table 2 lists the standard frequency configurations and the associated ordering information to be used in conjunction with the ordering code. Customer defined combinations are available. Table Pre-programmed pin-selectable output frequency combinations Ordering Info D0001 DXXXX Freq MHz fOUT fOUT Select Bit [FS] Default is [1] Contact factory for additional configurations. Frequency select bit are weakly tied high so if left unconnected the default setting will be [1] and the device will output the associated frequency highlighted in Bold. DSC2140 DSC2240 MK-Q-B-P-D-12050110 DSC2140 DSC2240 Low-Jitter I2C/SPI Programmable HCSL Oscillator Absolute Maximum Ratings Item Min Max Unit Supply Voltage Input Voltage VDD+0.3 Junction Temp +150 Storage Temp -55 +150 Soldering Temp - +260 4000 1500 Note 1000+ years of data retention on internal memory Condition 40sec max. Specifications Unless specified otherwise T=25° C Ordering Code Prog Mode 1 I2C bus 2 SPI bus Temp Range E -20 to 70 I -40 to 85 Packing T Tape & Reel Tube DSC2 1 40 F I 2 - Package F 3.2x2.5mm Stability 1 ±50ppm 2 ±25ppm 5 ±10ppm Freq MHz See Freq. table Parameter Condition Supply Voltage1 Supply Current Supply Current2 Frequency Stability Aging Startup Time2 Input Logic Levels Input logic high Input logic low Output Disable Time3 Output Enable Time Pull-Up Resistor4 EN pin low output is disabled Output Enabled, RL=50Ω Includes frequency variations due to initial tolerance, temp. and power supply voltage 1 year T=25°C VIH VIL tDA tEN Pull-up exists on all digital IO HCSL Output Output Logic Levels Output logic high Output logic low Pk to Pk Output Swing Output Transition time4 Rise Time Fall Time Frequency Output Duty Cycle VOH VOL tR tF f0 SYM RL=50Ω Single-Ended 20% to 80% RL=50Ω, CL= 2pF Single Frequency Differential Period Jitter5 JPER FO1=156.25 MHz Integrated Phase Noise 200kHz to 20MHz 100kHz to 20MHz |
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