KS8993M

KS8993M Datasheet

KS8993M/ML/MI Product Brief

Part	Datasheet
KS8993M	KS8993M (pdf)

Related Parts	Information
KS8993ML	KS8993ML
KS8993MI	KS8993MI

PDF Datasheet Preview
KS8993M/ML/MI Product Brief Integrated 3-Port 10/100 Managed Switch with PHY The KS8993M family is a highly integrated Layer 2 managed switch designed for low-port count, cost-sensitive 10/100 Mbps switch systems. It offers an extensive feature set that includes tag/port-based VLAN, QoS priority, switch management, MIB counters, MII/SMI interface, and CPU control/data interfaces to effectively address both current and emerging Fast Ethernet applications. The KS8993M contains two 10/100 transceivers with patented mixed-signal low-power technology, three media access control MAC units, a high-speed non-blocking switch fabric, a dedicated address look-up engine, and an on-chip frame buffer memory. Both PHY ports support 10BASE-T and 100BASE-TX with Auto-MDIX for reliable detection of and correction for straight-through and crossover cables. In addition, one PHY port supports 100BASE-FX for managed media converter applications. QoS prioritization, both tag and port-based, makes the KS8993M family ideal for latency critical applications such as Voice over Internet Protocol VoIP phones and industrial Ethernet applications. The KS8993M is available in a wide variety of power supply, packaging, and temperature options to fit the demanding needs of today’s applications. Commercial temperature range 0oC to +70oC Industrial temperature range to +85oC. For additional information, contact your local Micrel Field Application Engineer or salesperson. Block Diagram AUTO MDI/MDI-X AUTO MDI/MDI-X MII/SNI 10/100 T/TX/FX PHY 1 10/100 T/TX PHY 2 10/100 MAC 1 10/100 MAC 2 10/100 MAC 3 FIFO, Flow Control, VLAN Tagging, Priority 1K Look-Up Engine Queue Management Buffer Management Frame Buffers MIB Counters MIIM SMI I2C P1 LED[3:0] P2 LED[3:0] LED Drivers Control Registers Strap-In Configuration Micrel Semiconductor TEL FAX: EEPROM Interface • QoS packet prioritization support Per port, 802.1p, and DiffServ-based Re-mapping of IEEE 802.1p priority field per port basis • IEEE 802.1q VLAN support for up to 16 groups Tag/untag on per port basis • Advanced switch features IEEE 802.1d Spanning Tree Protocol support Programmable rate limiting from 0Mbps to 100Mbps Broadcast storm protection with % control • Switch management Port mirroring/sniffing 34 MIB counters per port. • Multiple register access options SMI, SPI, and I2C interface to all registers MII management MIIM access to PHY registers • Optimized power modes, packaging, and power supplies Full-chip hardware power-down, port-based software power save mode. Lead-free and standard packages available 1.8V and 2.5V/3.3V or 3.3V only option Industrial and commercial temperature options. Available in 128-pin PQFP • Enables latency critical applications to transport network traffic with minimal interruption. Per port re-mapping enforces priority policies by overriding embedded levels. • Secures and segregates network traffic Supports a full range of VLAN IDs 4096 • Allows redundancy and shape/protect traffic Resolves loops and permits redundancy Allocates bandwidth with 32kbps granularity Guards against denial of service DoS attacks • Delivers comprehensive remote management capability Enables complete view of network activity • Interfaces with a wide variety of devices Connects to EEPROM/CPU for un/managed operations On the fly configuration of switch/PHY parameters

PDF Datasheet Preview

KS8993M/ML/MI Product Brief

Integrated 3-Port 10/100 Managed Switch with PHY

The KS8993M family is a highly integrated Layer 2 managed switch designed for low-port count, cost-sensitive 10/100 Mbps switch systems. It offers an extensive feature set that includes tag/port-based VLAN, QoS priority, switch management, MIB counters, MII/SMI interface, and CPU control/data interfaces to effectively address both current and emerging Fast Ethernet applications.

The KS8993M contains two 10/100 transceivers with patented mixed-signal low-power technology, three media access control MAC units, a high-speed non-blocking switch fabric, a dedicated address look-up engine, and an on-chip frame buffer memory.

Both PHY ports support 10BASE-T and 100BASE-TX with Auto-MDIX for reliable detection of and correction for straight-through and crossover cables. In addition, one PHY port supports 100BASE-FX for managed media converter applications.

QoS prioritization, both tag and port-based, makes the KS8993M family ideal for latency critical applications such as Voice over Internet Protocol VoIP phones and industrial Ethernet applications.

The KS8993M is available in a wide variety of power supply, packaging, and temperature options to fit the demanding needs of today’s applications. Commercial temperature range 0oC to +70oC Industrial temperature range to +85oC.

For additional information, contact your local Micrel Field Application Engineer or salesperson.

Block Diagram

AUTO MDI/MDI-X

AUTO MDI/MDI-X

MII/SNI
10/100 T/TX/FX PHY 1
10/100 T/TX PHY 2
10/100 MAC 1
10/100 MAC 2
10/100 MAC 3

FIFO, Flow Control, VLAN Tagging, Priority
1K Look-Up Engine

Queue Management

Buffer Management

Frame Buffers

MIB Counters

MIIM SMI I2C

P1 LED[3:0] P2 LED[3:0]

LED Drivers

Control Registers

Strap-In Configuration

Micrel Semiconductor TEL FAX:

EEPROM Interface
• QoS packet prioritization support Per port, 802.1p, and DiffServ-based Re-mapping of IEEE 802.1p priority field per port basis
• IEEE 802.1q VLAN support for up to 16 groups Tag/untag on per port basis
• Advanced switch features IEEE 802.1d Spanning Tree Protocol support Programmable rate limiting from 0Mbps to 100Mbps Broadcast storm protection with % control
• Switch management Port mirroring/sniffing 34 MIB counters per port.
• Multiple register access options SMI, SPI, and I2C interface to all registers MII management MIIM access to PHY registers
• Optimized power modes, packaging, and power supplies Full-chip hardware power-down, port-based software power save mode. Lead-free and standard packages available 1.8V and 2.5V/3.3V or 3.3V only option Industrial and commercial temperature options. Available in 128-pin PQFP
• Enables latency critical applications to transport network traffic with minimal interruption. Per port re-mapping enforces priority policies by overriding embedded levels.
• Secures and segregates network traffic Supports a full range of VLAN IDs 4096
• Allows redundancy and shape/protect traffic Resolves loops and permits redundancy Allocates bandwidth with 32kbps granularity Guards against denial of service DoS attacks
• Delivers comprehensive remote management capability Enables complete view of network activity
• Interfaces with a wide variety of devices Connects to EEPROM/CPU for un/managed operations On the fly configuration of switch/PHY parameters

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived KS8993M Datasheet file may be downloaded here without warranties.

Datasheet ID: KS8993M 647876