U5020M-MFP

U5020M-MFP Datasheet


U5020M

Part Datasheet
U5020M-MFP U5020M-MFP U5020M-MFP (pdf)
Related Parts Information
U5020M-MFPG3 U5020M-MFPG3 U5020M-MFPG3
U5020M-MFPY U5020M-MFPY U5020M-MFPY
U5020M-MFPG3Y U5020M-MFPG3Y U5020M-MFPG3Y
PDF Datasheet Preview
• Low Current Consumption IDD < 100 µA
• RC Oscillator
• Internal Reset During Power-up and Supply Voltage Drops POR
• “Short” Trigger Window for Active Mode
“Long” Trigger Window for Sleep Mode
• Cyclical Wake-up of the Microcontroller in Sleep Mode
• Trigger Input
• Six Wake-up Inputs
• Reset Output
• Enable Output

Digital Window Watchdog Timer

U5020M

The digital window watchdog timer, U5020M, is a CMOS integrated circuit. In applications where safety is critical, it is especially important to monitor the microcontroller. Normal microcontroller operation is indicated by a cyclically transmitted trigger signal, which is received by a window watchdog timer within a defined time window.

A missing or a wrong trigger signal causes the watchdog timer to reset the microcontroller. The IC is tailored for microcontrollers which can work in both full-power and sleep mode. With an additional voltage monitoring power-on reset and supply voltage drop reset , the U5020M offers a complete monitoring solution for microsystems in automotive and industrial applications.

Figure Block Diagram with External Ciruit

OSC 15
10 nF

Oscillator

Reset 10

Microcontroller

Input ts 16 Trigger 11

Mode 12

Input signal conditioning

Power-on reset

Wake up 3-8
14 GND

State machine

External
switching

Enable circuitry

POR Test logic

Test

Pin Configuration

Figure Pinning SO16 TM 1 TM 2

WAKE-UP 3 WAKE-UP 4 WAKE-UP 5 WAKE-UP 6 WAKE-UP 7 WAKE-UP 8
16 TS 15 OSC 14 GND 13 VDD 12 MODE 11 TRIG 10 RESET 9 ENA
2 U5020M

U5020M

Pin Description

Symbol Function

Test must not be connected
2 3 to 8

TM WAKE-UP

Test must be connected to GND

Wake-up inputs pull-down resistor There are six digitally debounced wake-up inputs. During the long trigger mode each signal slope at the inputs initiates a reset pulse at pin

Enable output push-pull It is used for the control of peripheral components. It is activated after the processor triggers three times correctly.

Reset output open drain

RESET Resets the processor in the case of a trigger error or if a wake-up pulse occurs during the long watchdog
period.
Ordering Information

Extended Type Number U5020M-MFPY U5020M-MFPG3Y

Package SO16

Remarks Tubed, Pb-free Taped and reelded, Pb-free

Package Information

Package SO16

Dimensions in mm
technical drawings according to DIN specifications

History
4755B-AUTO-11/05
• Put datasheet in a new template
• First page Pb-free logo added
• Page 9 Ordering Information changed

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Datasheet ID: U5020M-MFP 519504