ATTINY2313V-10MI

ATTINY2313V-10MI Datasheet


Endurance 100,000 Write/Erase Cycles 128 Bytes Internal SRAM Programming Lock for Flash Program and EEPROM Data Security<br>• Peripheral Features One 8-bit Timer/Counter with Separate Prescaler and Compare Mode One 16-bit Timer/Counter with Separate Prescaler, Compare and Capture Modes Four PWM Channels On-chip Analog Comparator Programmable Watchdog Timer with On-chip Oscillator USI Universal Serial Interface Full Duplex USART<br>• Special Microcontroller Features debugWIRE On-chip Debugging In-System Programmable via SPI Port External and Internal Interrupt Sources Low-power Idle, Power-down, and Standby Modes Enhanced Power-on Reset Circuit Programmable Brown-out Detection Circuit Internal Calibrated Oscillator<br>• I/O and Packages 18 Programmable I/O Lines 20-pin PDIP, 20-pin SOIC, and 32-pin MLF<br>• Operating Voltages - 5.5V ATtiny2313<br>• Speed Grades ATtiny2313V 0 - 4 MHz - 5.5V, 0 - 10 MHz - 5.5V ATtiny2313 0 - 10 MHz - 5.5V, 0 - 20 MHz - 5.5V<br>• Power Consumption Estimates Active Mode

Part Datasheet
ATTINY2313V-10MI ATTINY2313V-10MI ATTINY2313V-10MI (pdf)
Related Parts Information
ATTINY2313V-10PI ATTINY2313V-10PI ATTINY2313V-10PI
ATTINY2313-20PI ATTINY2313-20PI ATTINY2313-20PI
ATTINY2313-20SJ ATTINY2313-20SJ ATTINY2313-20SJ
ATTINY2313-20PJ ATTINY2313-20PJ ATTINY2313-20PJ
ATTINY2313V-10PJ ATTINY2313V-10PJ ATTINY2313V-10PJ
ATTINY2313-20SI ATTINY2313-20SI ATTINY2313-20SI
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• Utilizes the RISC Architecture
• AVR High-performance and Low-power RISC Architecture
120 Powerful Instructions Most Single Clock Cycle Execution 32 x 8 General Purpose Working Registers Fully Static Operation Up to 20 MIPS Throughput at 20 MHz
• Data and Non-volatile Program and Data Memories 2K Bytes of In-System Self Programmable Flash

Endurance 10,000 Write/Erase Cycles 128 Bytes In-System Programmable EEPROM

Endurance 100,000 Write/Erase Cycles 128 Bytes Internal SRAM Programming Lock for Flash Program and EEPROM Data Security
• Peripheral Features One 8-bit Timer/Counter with Separate Prescaler and Compare Mode One 16-bit Timer/Counter with Separate Prescaler, Compare and Capture Modes Four PWM Channels On-chip Analog Comparator Programmable Watchdog Timer with On-chip Oscillator USI Universal Serial Interface Full Duplex USART
• Special Microcontroller Features debugWIRE On-chip Debugging In-System Programmable via SPI Port External and Internal Interrupt Sources Low-power Idle, Power-down, and Standby Modes Enhanced Power-on Reset Circuit Programmable Brown-out Detection Circuit Internal Calibrated Oscillator
• I/O and Packages 18 Programmable I/O Lines 20-pin PDIP, 20-pin SOIC, and 32-pin MLF
• Operating Voltages - 5.5V ATtiny2313
• Speed Grades ATtiny2313V 0 - 4 MHz - 5.5V, 0 - 10 MHz - 5.5V ATtiny2313 0 - 10 MHz - 5.5V, 0 - 20 MHz - 5.5V
• Power Consumption Estimates Active Mode
1 MHz, 1.8V 300 µA 32 kHz, 1.8V 20 µA including oscillator Power-down Mode < µA at 1.8V
8-bit Microcontroller with 2K Bytes In-System Programmable Flash

ATtiny2313/V

Preliminary Summary

Note This is a summary document. A complete document is available on our Web site at

Pin Configurations

Figure Pinout ATtiny2313

PDIP/SOIC

RESET/dW PA2 1 RXD PD0 2 TXD PD1 3

XTAL2 PA1 4 XTAL1 PA0 5 CKOUT/XCK/INT0 PD2 6

INT1 PD3 7 T0 PD4 8

OC0B/T1 PD5 9 GND 10
20 VCC 19 PB7 UCSK/SCK/PCINT7 18 PB6 MISO/DO/PCINT6 17 PB5 MOSI/DI/SDA/PCINT5 16 PB4 OC1B/PCINT4 15 PB3 OC1A/PCINT3 14 PB2 OC0A/PCINT2 13 PB1 AIN1/PCINT1 12 PB0 AIN0/PCINT0 11 PD6 ICP

Overview

The ATtiny2313 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architecture. By executing powerful instructions in a single clock cycle, the ATtiny2313 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to optimize power consumption versus processing speed.
2 ATtiny2313/V

Block Diagram

ATtiny2313/V

Figure Block Diagram

PA0 - PA2

PORTA DRIVERS

VCC GND

DATA REGISTER PORTA

DATA DIR. REG. PORTA
8-BIT DATA BUS

PROGRAM COUNTER

PROGRAM FLASH

INSTRUCTION REGISTER

INSTRUCTION DECODER

CONTROL LINES

PROGRAMMING LOGIC

STACK POINTER

SRAM

GENERAL PURPOSE REGISTER

STATUS REGISTER

XTAL1

XTAL2
Ordering Information

Speed MHz

Power Supply
- 5.5V
- 5.5V
Ordering Code

ATtiny2313V-10PI ATtiny2313V-10PJ 2 ATtiny2313V-10SI ATtiny2313V-10SJ 2

ATtiny2313-20PI ATtiny2313-20PJ 2 ATtiny2313-20SI ATtiny2313-20SJ 2

Package 1
20P3 20S
20P3 20S

Operation Range

Industrial -40°C to 85°C

Industrial -40°C to 85°C

Note:
This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities.

Pb-free packaging alternative. See Figure 81 on page 177 and Figure 82 on page
20P3 20S

Package Type 20-lead, Wide, Plastic Dual Inline Package PDIP 20-lead, Wide, Plastic Gull Wing Small Outline SOIC
10 ATtiny2313/V

Packaging Information
20P3

ATtiny2313/V

D PIN 1

SEATING PLANE

This package conforms to JEDEC reference MS-001, Variation AD. Dimensions D and E1 do not include mold Flash or Protrusion.

Mold Flash or Protrusion shall not exceed mm

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL MIN

NOM MAX NOTE

Note 2

Note 2

TITLE 2325 Orchard Parkway 20P3, 20-lead mm Wide Plastic Dual R San Jose, CA 95131 Inline Package PDIP
1/12/04
20P3

Top View

End View

Side View

COMMON DIMENSIONS Unit of Measure = inches

SYMBOL MIN NOM

NOTE
4 1 2 3

Notes This drawing is for general information only refer to JEDEC Drawing MS-013, Variation AC for additional information.

Dimension "D" does not include mold Flash, protrusions or gate burrs. Mold Flash, protrusions and gate burrs shall not exceed
mm per side.

Dimension "E" does not include inter-lead Flash or protrusion. Inter-lead Flash and protrusions shall not exceed mm
per side.
"L" is the length of the terminal for soldering to a substrate.

The lead width "b", as measured mm or greater above the seating plane, shall not exceed a maximum value of mm
per side.
1/9/02
2325 Orchard Parkway R San Jose, CA 95131

TITLE 20S2, 20-lead, Wide Body, Plastic Gull Wing Small Outline Package SOIC
20S2
12 ATtiny2313/V

Errata
Updated “Ordering Information” on page

Updated “Maximum Speed vs. VCC” on page

Updated Table 2 on page

Replaced “Watchdog Timer” on page

Added “Maximum Speed vs. VCC” on page
“Serial Programming Algorithm” on page 171 updated.

Changed mA to µA in preliminary Figure 110 on page
“Ordering Information” on page 10 updated.

MLF package option removed

Package drawing “20P3” on page 11 updated.

Updated C-code examples.

Renamed instances of SPMEN to SELFPRGEN, Self Programming

Enable.

Updated “Calibrated Internal RC Oscillator” on page

Fixed typo from UART to USART and updated Speed Grades and Power

Consumption Estimates in “Features” on page

Updated “Pin Configurations” on page

Updated Table 15 on page 33 and Table 80 on page

Updated item 5 in “Serial Programming Algorithm” on page

Updated “Electrical Characteristics” on page

Updated Figure 81 on page 177 and added Figure 82 on page

Changed SFIOR to GTCCR in “Register Summary” on page
Updated “Ordering Information” on page

Added new errata in “Errata” on page
14 ATtiny2313/V

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Literature Requests

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Datasheet ID: ATTINY2313V-10MI 519324