ATA6612P-PLQW

ATA6612P-PLQW Datasheet

• Very Low Current Consumption in Sleep Mode • 8Kbytes/16Kbytes Flash Memory for Application Program Atmel ATA6612/ATA6613 • Supply Voltage Up to 40V • Operating Voltage 5V to 27V • Temperature Range Tcase to +125°C • QFN48, 7mm x 7mm Package

Part	Datasheet
ATA6612P-PLQW	ATA6612P-PLQW (pdf)

Related Parts	Information
ATA6613P-PLQW	ATA6613P-PLQW
ATA6612P-PLPW	ATA6612P-PLPW
ATA6613P-PLPW	ATA6613P-PLPW

PDF Datasheet Preview
General Features • Single-package Fully-integrated Atmel AVR 8-bit Microcontroller with LIN Transceiver, 5V Regulator and Watchdog • Very Low Current Consumption in Sleep Mode • 8Kbytes/16Kbytes Flash Memory for Application Program Atmel ATA6612/ATA6613 • Supply Voltage Up to 40V • Operating Voltage 5V to 27V • Temperature Range Tcase to +125°C • QFN48, 7mm x 7mm Package ATA6612/ATA6613 is a System-in-Package SiP product, which is particularly suited for complete LIN-bus slave-node applications. It supports highly integrated solutions for in-vehicle LIN networks. The first chip is the LIN-system-basis-chip LIN-SBC Atmel ATA6624, which has an integrated LIN transceiver, a 5V regulator and a window watchdog. The second chip is an automotive microcontroller from Atmel’s series of Atmel 8-bit microcontroller with advanced RISC architecture. The Atmel ATA6612 consists of the LIN-SBC Atmel ATA6624 and the Atmel ATmega88 with 8 Kbytes flash. The Atmel ATA6613 consists of the LIN-SBC Atmel ATA6624 and the Atmel ATmega168 with 16 Kbytes flash. All pins of the LIN System Basis Chip as well as all pins of the Atmel AVR microcontroller are bonded out to provide customers the same flexibility for their applications as they have when using discrete parts. In section 2 you will find the pin configuration for the complete SiP. In sections 3 to 5 the LIN SBC is described, and in sections 6 to 7 the Atmel AVR is described in detail. Figure Application Diagram LIN Bus Microcontroller with LIN Transceiver, 5V Regulator and Watchdog Atmel ATA6612 Atmel ATA6613 Atmel ATA6612/ATA6613 MCU Atmel ATmega88 or ATmega168 LIN-SBC Atmel ATA6624 Pin Configuration Figure Pinning QFN48, 7mm x 7mm PB4 PB3 PB2 PB1 PB0 PD7 PD6 PD5 PB7 PB6 MCUVDD2 GND2 PB5 MCUAVDD ADC6 AREF GND4 ADC7 PC0 PC1 PC2 PC3 PC4 PC5 48 47 46 45 44 43 42 41 40 39 38 37 13 14 15 16 17 18 19 20 21 22 23 24 MCUVDD1 GND1 PD4 PD3 LIN GND WAKE NTRIG EN VS VCC PVCC PC6 PD0 PD1 PD2 RXD INH TXD NRES WD_OSC TM MODE KL_15 Table Pin Description Symbol Function Port B 5 I/O line SCK / PCINT5 MCUAVDD Microcontroller ADC-unit supply voltage ADC6 ADC input channel 6 AREF Analog reference voltage input GND4 Ground ADC7 ADC input channel 7 Port C 0 I/O line ADC0/PCINT8 Port C 1 I/O line ADC1/PCINT9 Port C 2 I/O line ADC2/PCINT10 Port C 3 I/O line ADC3/PCINT11 Port C 4 I/O line ADC4/SDA/PCINT12 Port C 5 I/O line ADC5/SCL/PCINT13 Port C 6 I/O line RESET/PCINT14 Ordering Information Extended Type Number ATA6612P-PLQW ATA6612P-PLPW ATA6613P-PLQW ATA6613P-PLPW Package Information Program Memory 8kB flash 8kB flash 16kB flash 16kB flash Package QFN48, 7x 7 QFN48, 7x 7 QFN48, 7x 7 QFN48, 7x 7 MOQ 4,000 pieces 1,000 pieces 4,000 pieces 1,000 pieces Package QFN 48 - 7 x 7 Exposed pad x Dimensions in mm Not indicated tolerances ± 1 max. Drawing-No. Issue 1; 37 36 25 24 technical drawings according to DIN specifications 12 13 nom. Errata Atmel ATA6612 • Interrupts may be lost when writing the timer registers in the asynchronous timer Interrupts may be lost when writing the timer registers in the asynchronous timer If one of the timer registers which is synchronized to the asynchronous timer2 clock is written in the cycle before an overflow interrupt occurs, the interrupt may be lost. Problem Fix/Workaround Always check that the Timer2 Timer/Counter register, TCNT2, does not have the value 0xFF before writing the Timer2 Control Register, TCCR2, or Output Compare Register, OCR2. Atmel ATA6613 • Interrupts may be lost when writing the timer registers in the asynchronous timer Interrupts may be lost when writing the timer registers in the asynchronous timer If one of the timer registers which is synchronized to the asynchronous timer2 clock is written in the cycle before an overflow interrupt occurs, the interrupt may be lost. Problem Fix/Workaround Always check that the Timer2 Timer/Counter register, TCNT2, does not have the value 0xFF before writing the Timer2 Control Register, TCCR2, or Output Compare Register, OCR2. 360 Atmel ATA6612/ATA6613 Atmel ATA6612/ATA6613 History 9111H-AUTO-01/11 • Section “Features” on page 5 changed • Section “Ground Pin” on page 7 changed • Section “Mode Input Pin Mode ” on page 8 changed • Figure “Modes of Operation” on page 10 changed • Section “Fail-safe Mode” on page 13 changed • Section “Voltage Regulator” on pages 16 to 17 changed • Section 6 “Electrical Characteristics” on pages 21 to 26 changed 9111G-AUTO-05/10 • Table 2-2 “Maximum Ratings of the SiP” on page 4 changed • Section “Features” on page 5 changed • Section “Description” on page 5 changed • Section “Physical Layer Compatibility” on page 7 changed • Section “Bus Pin LIN” on page 7 changed • Section “TX Dominant Time-out Function” on page 8 changed • Section “Enable Input Pin EN ” on page 8 changed • Section “KL_15 Pin” on page 9 changed • Section “Modes of Operation” on pages 10 to 14 changed • Section “Wake-up Scenarios from Silent to Sleep Mode on page 15 changed • Section “Voltage Regulator” on page 16 changed • Section 6 “Electrical Characteristics” on page 23 changed • Section “Power Reduction Register” on page 66 changed 9111F-AUTO-12/08 • Section 11 “Errata” on page 360 changed 9111E-AUTO-07/08 • Table 2-2 “Maximum Ratings of the SiP” on page 4 changed • Section 4 “Absolute Maximum Ratings” on page 20 changed • Figure 8-1 “Typical LIN Slave Application” on page 355 changed • Figure 8-2 “Typical LIN Master Application” on page 356 changed • Figure 8-3 “LIN Slave Application with Minimum External Components” on page 357 changed • Figure 8-4 “Typical LIN Master Application LIN Master Pull-up Switched Off during Sleep Mode” on page 358 added 9111D-AUTO-06/08 • Figure 3-1 “Block Diagram” on page 6 changed • Section “Functional Description” on pages 7 to 18 changed • Section “The EEPROM Address Register EEARH and EEARL” on page 45 changed 9111C-AUTO-02/08 • Figure 8-2 “Typical LIN Master Application” on page 356 changed 8 Application 355 9 Ordering Information 359 10 Package Information 359 11 Errata 360 Atmel ATA6612 Atmel ATA6613 Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel +1 408 441-0311 Fax +1 408 487-2600 Atmel Asia Limited Unit 01-5 & 16, 19/F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel +852 2245-6100 Fax +852 2722-1369 Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel +49 89-31970-0 Fax +49 89-3194621 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 JAPAN Tel +81 3 3523-3551 Fax +81 3 3523-7581 Atmel logo and combinations thereof, AVR and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others. Disclaimer The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.

PDF Datasheet Preview

General Features
• Single-package Fully-integrated Atmel AVR 8-bit Microcontroller with LIN Transceiver, 5V Regulator and Watchdog
• Very Low Current Consumption in Sleep Mode
• 8Kbytes/16Kbytes Flash Memory for Application Program Atmel ATA6612/ATA6613
• Supply Voltage Up to 40V
• Operating Voltage 5V to 27V
• Temperature Range Tcase to +125°C
• QFN48, 7mm x 7mm Package

ATA6612/ATA6613 is a System-in-Package SiP product, which is particularly suited for complete LIN-bus slave-node applications. It supports highly integrated solutions for in-vehicle LIN networks. The first chip is the LIN-system-basis-chip LIN-SBC Atmel ATA6624, which has an integrated LIN transceiver, a 5V regulator and a window watchdog. The second chip is an automotive microcontroller from Atmel’s series of Atmel 8-bit microcontroller with advanced RISC architecture.

The Atmel ATA6612 consists of the LIN-SBC Atmel ATA6624 and the Atmel ATmega88 with 8 Kbytes flash. The Atmel ATA6613 consists of the LIN-SBC Atmel ATA6624 and the Atmel ATmega168 with 16 Kbytes flash. All pins of the LIN System Basis Chip as well as all pins of the Atmel AVR microcontroller are bonded out to provide customers the same flexibility for their applications as they have when using discrete parts.

In section 2 you will find the pin configuration for the complete SiP. In sections 3 to 5 the LIN SBC is described, and in sections 6 to 7 the Atmel AVR is described in detail.

Figure Application Diagram

LIN Bus

Microcontroller with LIN Transceiver, 5V Regulator and Watchdog

Atmel ATA6612 Atmel ATA6613

Atmel ATA6612/ATA6613

MCU Atmel ATmega88
or ATmega168

LIN-SBC Atmel

ATA6624

Pin Configuration

Figure Pinning QFN48, 7mm x 7mm

PB4 PB3 PB2 PB1 PB0 PD7 PD6 PD5 PB7 PB6 MCUVDD2 GND2

PB5 MCUAVDD

ADC6 AREF GND4 ADC7

PC0 PC1 PC2 PC3 PC4 PC5
48 47 46 45 44 43 42 41 40 39 38 37
13 14 15 16 17 18 19 20 21 22 23 24

MCUVDD1 GND1 PD4 PD3 LIN GND WAKE NTRIG EN VS VCC PVCC

PC6 PD0 PD1 PD2 RXD INH TXD NRES WD_OSC

TM MODE KL_15

Table Pin Description

Symbol Function

Port B 5 I/O line SCK / PCINT5

MCUAVDD Microcontroller ADC-unit supply voltage

ADC6 ADC input channel 6

AREF Analog reference voltage input

GND4 Ground

ADC7 ADC input channel 7

Port C 0 I/O line ADC0/PCINT8

Port C 1 I/O line ADC1/PCINT9

Port C 2 I/O line ADC2/PCINT10

Port C 3 I/O line ADC3/PCINT11

Port C 4 I/O line ADC4/SDA/PCINT12

Port C 5 I/O line ADC5/SCL/PCINT13

Port C 6 I/O line RESET/PCINT14
Ordering Information

Extended Type Number ATA6612P-PLQW ATA6612P-PLPW ATA6613P-PLQW ATA6613P-PLPW

Package Information

Program Memory 8kB flash 8kB flash 16kB flash 16kB flash

Package QFN48, 7x 7 QFN48, 7x 7 QFN48, 7x 7 QFN48, 7x 7

MOQ 4,000 pieces 1,000 pieces 4,000 pieces 1,000 pieces

Package QFN 48 - 7 x 7 Exposed pad x Dimensions in mm Not indicated tolerances ±
1 max.

Drawing-No. Issue 1;
37 36
25 24
technical drawings according to DIN specifications
12 13 nom.

Errata

Atmel ATA6612
• Interrupts may be lost when writing the timer registers in the asynchronous timer

Interrupts may be lost when writing the timer registers in the asynchronous timer If one of the timer registers which is synchronized to the asynchronous timer2 clock is written in the cycle before an overflow interrupt occurs, the interrupt may be lost.

Problem Fix/Workaround Always check that the Timer2 Timer/Counter register, TCNT2, does not have the value 0xFF before writing the Timer2 Control Register, TCCR2, or Output Compare Register, OCR2.

Atmel ATA6613
• Interrupts may be lost when writing the timer registers in the asynchronous timer

Interrupts may be lost when writing the timer registers in the asynchronous timer If one of the timer registers which is synchronized to the asynchronous timer2 clock is written in the cycle before an overflow interrupt occurs, the interrupt may be lost.

Problem Fix/Workaround Always check that the Timer2 Timer/Counter register, TCNT2, does not have the value 0xFF before writing the Timer2 Control Register, TCCR2, or Output Compare Register, OCR2.
360 Atmel ATA6612/ATA6613

Atmel ATA6612/ATA6613

History
9111H-AUTO-01/11
• Section “Features” on page 5 changed
• Section “Ground Pin” on page 7 changed
• Section “Mode Input Pin Mode ” on page 8 changed
• Figure “Modes of Operation” on page 10 changed
• Section “Fail-safe Mode” on page 13 changed
• Section “Voltage Regulator” on pages 16 to 17 changed
• Section 6 “Electrical Characteristics” on pages 21 to 26 changed
9111G-AUTO-05/10
• Table 2-2 “Maximum Ratings of the SiP” on page 4 changed
• Section “Features” on page 5 changed
• Section “Description” on page 5 changed
• Section “Physical Layer Compatibility” on page 7 changed
• Section “Bus Pin LIN” on page 7 changed
• Section “TX Dominant Time-out Function” on page 8 changed
• Section “Enable Input Pin EN ” on page 8 changed
• Section “KL_15 Pin” on page 9 changed
• Section “Modes of Operation” on pages 10 to 14 changed
• Section “Wake-up Scenarios from Silent to Sleep Mode on page
15 changed
• Section “Voltage Regulator” on page 16 changed
• Section 6 “Electrical Characteristics” on page 23 changed
• Section “Power Reduction Register” on page 66 changed
9111F-AUTO-12/08
• Section 11 “Errata” on page 360 changed
9111E-AUTO-07/08
• Table 2-2 “Maximum Ratings of the SiP” on page 4 changed
• Section 4 “Absolute Maximum Ratings” on page 20 changed
• Figure 8-1 “Typical LIN Slave Application” on page 355 changed
• Figure 8-2 “Typical LIN Master Application” on page 356 changed
• Figure 8-3 “LIN Slave Application with Minimum External Components”
on page 357 changed
• Figure 8-4 “Typical LIN Master Application LIN Master Pull-up Switched Off during Sleep Mode” on page 358 added
9111D-AUTO-06/08
• Figure 3-1 “Block Diagram” on page 6 changed
• Section “Functional Description” on pages 7 to 18 changed
• Section “The EEPROM Address Register EEARH and EEARL”
on page 45 changed
9111C-AUTO-02/08
• Figure 8-2 “Typical LIN Master Application” on page 356 changed
8 Application 355 9 Ordering Information 359 10 Package Information 359 11 Errata 360

Atmel ATA6612 Atmel ATA6613

Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel +1 408 441-0311 Fax +1 408 487-2600

Atmel Asia Limited Unit 01-5 & 16, 19/F BEA Tower, Millennium City 5 418 Kwun Tong Road Kwun Tong, Kowloon HONG KONG Tel +852 2245-6100 Fax +852 2722-1369

Atmel Munich GmbH Business Campus Parkring 4 D-85748 Garching b. Munich GERMANY Tel +49 89-31970-0 Fax +49 89-3194621

Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 JAPAN Tel +81 3 3523-3551 Fax +81 3 3523-7581

Atmel logo and combinations thereof, AVR and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others.

Disclaimer The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.

More datasheets: 0805-91NK | 0805-68NK | DC-ANT-DBDP3 | K000081 | 11-21/GHC-YT1U2/2T | FDFMJ2P023Z | 32771 | 32770 | 30046 | 30043

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived ATA6612P-PLQW Datasheet file may be downloaded here without warranties.

Datasheet ID: ATA6612P-PLQW 519195