AT91RM3400-AU-002

AT91RM3400-AU-002 Datasheet

AT91RM3400

Part	Datasheet
AT91RM3400-AU-002	AT91RM3400-AU-002 (pdf)

PDF Datasheet Preview
• Incorporates the ARM7TDMI Processor Embedded ICE In-circuit Emulation, Debug Communication Channel Support • 96K Bytes of Internal High-speed SRAM • 256K Bytes of Internal High-speed ROM Integrating Default Boot Program Downloads Application from External Storage Medium in Internal SRAM • Memory Controller MC Memory Protection Unit, Abort Status and Misalignment Detection • Clock Generator and Power Management Controller PMC 3 to 20 MHz and 32 kHz On-chip Oscillators with Two PLLs Programmable Software Power Optimization Capabilities Four Programmable External Clock Signals • Advanced Interrupt Controller AIC Thirty Individually Maskable, Eight-level Priority, Vectored Interrupt Sources Seven External Interrupt Sources and One Fast Interrupt Source, Spurious Interrupt Protected • Two 32-bit Parallel Input/Output Controllers PIO PIOA and PIOB Sixty-three Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os Input Change Interrupt Capability on Each I/O Line Individually Programmable Open-drain and Synchronous Output • System Timer ST Including a 16-bit Counter, Watchdog and Second Counter • Real Time Clock RTC with Alarm Interrupt • Debug Unit DBGU , 2-wire USART and Support for Debug Communication Channel Programmable ICE Access Prevention • Twenty Peripheral Data Controller PDC Channels • USB Full-speed 12 Mbits per second Device Port UDP On-chip Transceiver 2-Kbyte Configurable FIFO for Loading and Storing Messages • Multimedia Card Interface MCI Automatic Protocol Control and Fast Automatic Data Transfers with PDC MMC and SDCard Compliant, Support for up to two SDCards • Three Synchronous Serial Controllers SSC Independent Clock and Frame Sync Signals for Each Receiver and Transmitter Analog Interface Support, Time Division Multiplex Support High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer • Four Universal Synchronous/Asynchronous Receiver Transmitters USART Individual Baud Rate Generator Support for ISO7816 T0/T1 Smart Card, Hardware and Software Handshaking, RS485 Support Modem Control Lines on USART 1, IrDA Infrared Modulation/Demodulation • Master/Slave Serial Peripheral Interface SPI 8- to 16-bit Programmable Data Length Four External Peripheral Chip Selects • Two Three-channel 16-bit Timer/Counters TC Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel Double PWM Generation, Capture/Waveform Mode, Up/Down Capability • Two-wire Interface TWI Master Mode Support, All Two-wire Atmel EEPROMs Supported • IEEE JTAG Boundary Scan on All Digital Pins • Required Power Supplies 1.65V to 1.95V for VDDCORE, VDDOSC and VDDPLL 1.65V to 3.6V on VDDIO • Fully Static Operation 0 Hz to 66 MHz up to 60 MIPS • Available in a 100-lead LQFP Package ARM7TDMI based Microcontroller AT91RM3400 The AT91RM3400 is a fully integrated member of the Atmel advanced AT91 ARM microcontroller family. Having no external memory interface and equipped with embedded SRAM and ROM, it is ideal for numerous applications with medium memory requirements but which demand high performance. Several options are available to download software to the internal SRAM. These include downloading from a serial EEPROM or serial or downloading through the USB Device Port. Additionally, customizing of the embedded ROM is available on request for large volume opportunities. The Advanced Interrupt Controller AIC enhances the interrupt handling performance of the ARM7TDMI processor by providing multiple vectored, prioritized interrupt sources and reduces the cycles taken to transfer to an interrupt handler. The Peripheral Data Controller PDC provides DMA channels for all the serial peripherals, enabling them to transfer data to or from on-chip memories without processor intervention. This reduces the processor overhead when dealing with transfers of continuous data streams. The set of Parallel I/O PIO Controllers multiplex the peripheral input/output lines with general-purpose data I/Os, reducing the external pin count of the device and providing an interrupt and open drain capability on each line. The Power Management Controller PMC keeps system power consumption to a minimum by selectively enabling and/or disabling the core and various peripherals under software control. It uses an enhanced clock generator to provide a selection of clock signals including a slow clock 32 kHz for power-saving mode. The wide range of system interfaces includes USB V2.0 Full-speed Device Port, Multimedia Card, Serial Peripheral Interface SPI and Two-wire Interface TWI . Peripherals include multiple USARTs, Timer/Counters and Serial Synchronous Controllers SSC . The AT91RM3400 includes an extensive set of peripherals that operate in accordance with several industry standards, such as those used in audio, communication, computer and smart card applications. 2 AT91RM3400 AT91RM3400 Block Diagram Bold arrows Figure AT91RM3400 Block Diagram TST NRST Reset and Test JTAGSEL TDI TDO TMS TCK JTAG Scan indicate master-to-slave dependency. ARM7TDMI Processor FIQ IRQ0-IRQ6 PCK0-PCK3 PLLRCB PLLRCA XIN XOUT XIN32 XOUT32 DRXD DTXD DM DP MCCK MCCDA MCDA0-MCDA3 MCCDB MCDB0-MCDB3 RXD0 TXD0 SCK0 RTS0 CTS0 RXD1 TXD1 SCK1 RTS1 CTS1 DSR1 DTR1 DCD1 RI1 RXD2 TXD2 SCK2 RTS2 CTS2 RXD3 TXD3 SCK3 RTS3 CTS3 Transceiver PLLB PLLA AT91RM3400 Ordering Information Table Ordering Information Ordering Code AT91RM3400-AI-001 Package LQFP 100 Temperature Operating Range Industrial -40°C to 85°C AT91RM3400 Table of Contents 1 Description 2 Block 3 Key Features 4 ARM7TDMI Processor 4 Debug and 4 Boot ROM 4 Embedded Software Services 4 Reset Controller 4 Memory 4 Advanced Interrupt Controller 5 Power Management Controller 6 System Timer 6 Real-time Clock 6 Debug Unit 6 Parallel Input/Output 7 Serial Peripheral 7 Two-wire 8 USART 8 Serial Synchronous Controller 8 Timer Counter 8 Multimedia Card Interface 9 USB Device Port 9 AT91RM3400 Product Properties 11 Power Supplies 11 Mechanical Overview of the 100-lead LQFP 12 Peripheral Multiplexing on PIO Lines 13 PIO Controller A Multiplexing 13 PIO Controller B Multiplexing 15 Pin Name 16 Peripheral Identifiers 19 System 20 External 20 Product Memory 20 Internal Memory Mapping 20 Peripheral Mapping 21 Peripheral 23 USART 23 Timer Counter 23 USB Device Port 23 ARM7TDMI Processor Overview 25 ARM7TDMI Processor 26 Instruction 26 Data 26 ARM7TDMI Operating 26 ARM7TDMI Registers 26 ARM Instruction Set Overview 28 Thumb Instruction Set Overview 29 AT91RM3400 Debug and Test Features 31 Block 32 Application Examples 33 Debug Environment 33 Test Environment 33 Debug and Test Pin Description 34 Functional 34 Test Pin 34 Embedded In-circuit Emulator 34 Debug Unit 35 IEEE JTAG Boundary Scan 35 AT91RM3400 ID Code Register 42 Boot 43 Flow Diagram 44 45 Valid Image Detection 46 Structure of ARM Vector 6 47 Bootloader 48 Boot Uploader 52 External Communication Channels 52 Hardware and Software 54 Embedded Software Services 55 Service Definition 55 Service 55 Using a Service 56 Embedded Software Services 59 Definition 59 ROM Entry Service 59 Tempo Service 60 Xmodem 63 DataFlash 69 CRC Service 74 ii AT91RM3400 AT91RM3400 Sine Service 76 Reset 77 NRST Conditions 77 Reset Management 78 Recommended Features of the Reset Controller 78 Memory Controller 79 Block 80 Functional 81 Bus Arbiter 81 Address Decoder 81 Remap Command 82 Abort Status 83 Memory Protection 83 Misalignment Detector 84 AT91RM3400 Memory Controller MC User Interface 85 MC Remap Control Register 86 MC Abort Status Register 87 MC Abort Address Status Register 89 MC Protection Unit Area 0 to 15 Registers 90 MC Protection Unit 91 MC Protection Unit Enable Register 92 Peripheral Data Controller PDC 93 Block 93 Functional 94 Memory Pointers 94 Transfer Counters 94 Data Transfers 95 Priority of PDC Transfer Requests 95 Peripheral Data Controller PDC User Interface 96 PDC Receive Pointer Register 96 PDC Receive Counter Register 97 PDC Transmit Pointer Register 97 PDC Transmit Counter Register 97 PDC Receive Next Pointer Register 98 PDC Receive Next Counter Register 98 PDC Transmit Next Pointer Register 98 PDC Transmit Next Counter Register 99 PDC Transfer Control Register 99 PDC Transfer Status 100 Advanced Interrupt Controller AIC 101 Block 102 Application Block Diagram 102 AIC Detailed Block Diagram 102 I/O Line 103 Product 103 I/O 103 Power Management 103 Interrupt 103 Functional 104 Interrupt Source Control 104 Interrupt Latencies 106 Normal Interrupt 107 Fast 109 Protect 112 Spurious 113 General Interrupt Mask 113 Advanced Interrupt Controller AIC User Interface 114 AIC Source Mode Register 115 AIC Source Vector Register 115 AIC Interrupt Vector Register 116 AIC FIQ Vector 116 AIC Interrupt Status Register 117 AIC Interrupt Pending Register 117 AIC Interrupt Mask Register 118 AIC Core Interrupt Status Register 118 AIC Interrupt Enable Command 119 AIC Interrupt Disable Command Register 119 AIC Interrupt Clear Command Register 120 AIC Interrupt Set Command Register 120 AIC End of Interrupt Command Register 121 AIC Spurious Interrupt Vector Register 121 AIC Debug Control 122 AIC Fast Forcing Enable 123 AIC Fast Forcing Disable Register 123 AIC Fast Forcing Status 124 Power Management Controller PMC 125 Block 126 Product 127 I/O 127 iv AT91RM3400 AT91RM3400 127 Oscillator and PLL Characteristics 127 Peripheral Clocks 127 USB Clocks 127 Functional 128 Operating Modes 128 Clock Definitions 128 Clock Generator 128 Slow Clock Oscillator 129 Main Oscillator 130 Divider and PLL Blocks 132 Clock Controllers 133 Clock Switching Details 137 Master Clock Switching Timings 137 Clock Switching 138 Power Management Controller PMC User Interface 140 PMC System Clock Enable 141 PMC System Clock Disable Register 142 PMC System Clock Status 143 PMC Peripheral Clock Enable Register 144 PMC Peripheral Clock Disable Register 144 PMC Peripheral Clock Status Register 145 PMC Clock Generator Main Oscillator Register 146 PMC Clock Generator Main Clock Frequency Register 147 PMC Clock Generator PLL A Register 148 PMC Clock Generator PLL B Register 149 PMC Master Clock Register 150 PMC Programmable Clock Register 0 to 3 151 PMC Interrupt Enable Register 152 PMC Interrupt Disable Register 152 PMC Status 153 PMC Interrupt Mask Register 154 System Timer ST 155 Block 155 Application Block Diagram 155 Product 156 Power Management 156 Interrupt 156 Watchdog Overflow 156 Functional 156 System Timer Clock 156 Period Interval Timer PIT 156 Watchdog Timer WDT 157 Real-time Timer RTT 157 System Timer ST User Interface 159 ST Control 159 ST Period Interval Mode Register 160 ST Watchdog Mode Register 160 ST Real-Time Mode 161 ST Status Register 161 ST Interrupt Enable 162 ST Interrupt Disable Register 162 ST Interrupt Mask Register 163 ST Real-time Alarm Register 163 ST Current Real-Time 164 Real Time Clock RTC 165 Block 165 Product 165 Power Management 165 Functional 166 Reference 166 Timing 166 Error Checking 166 Updating Time/Calendar 167 Real Time Clock RTC User Interface 168 RTC Control Register 169 RTC Mode Register 170 RTC Time Register 170 RTC Calendar 171 RTC Time Alarm Register 172 RTC Calendar Alarm Register 173 RTC Status Register 174 RTC Status Clear Command Register 175 RTC Interrupt Enable Register 176 RTC Interrupt Disable Register 177 RTC Interrupt Mask Register 178 RTC Valid Entry Register 179 Debug Unit DBGU 181 Block 182 Product 183 I/O 183 Power Management 183 Interrupt Source 183 vi AT91RM3400 AT91RM3400 UART 183 Baud Rate Generator 183 Receiver 184 Transmitter 186 Peripheral Data 187 Test Modes 187 Debug Communication Channel 189 Chip Identifier 189 ICE Access Prevention 189 Debug Unit User Interface 190 Debug Unit Control Register 191 Debug Unit Mode Register 192 Debug Unit Interrupt Enable Register 193 Debug Unit Interrupt Disable Register 194 Debug Unit Interrupt Mask Register 195 Debug Unit Status 196 Debug Unit Receiver Holding Register 198 Debug Unit Baud Rate Generator 199 Debug Unit Chip ID Register 200 Debug Unit Chip ID Extension Register 202 Debug Unit Force NTRST 202 Parallel Input/Output Controller PIO 203 Block 204 Product 205 Pin Multiplexing 205 External Interrupt Lines 205 Power Management 205 Interrupt Generation 205 Functional 206 Pull-up Resistor Control 207 I/O Line or Peripheral Function Selection 207 Peripheral A or B Selection 207 Output 207 Synchronous Data 208 Multi Drive Control Open Drain 208 Output Line Timings 208 Inputs 209 Input Glitch Filtering 209 Input Change Interrupt 210 I/O Lines Programming Example 211 Parallel Input/Output Controller PIO User 212 PIO Enable Register 214 PIO Disable 214 PIO Status Register 215 PIO Output Enable 215 PIO Output Disable Register 216 PIO Output Status 216 PIO Input Filter Enable Register 217 PIO Input Filter Disable 217 PIO Input Filter Status Register 218 PIO Set Output Data Register 218 PIO Clear Output Data 219 PIO Output Data Status Register 219 PIO Pin Data Status 220 PIO Interrupt Enable Register 220 PIO Interrupt Disable Register 221 PIO Interrupt Mask 221 PIO Interrupt Status Register 222 PIO Multi-driver Enable 222 PIO Multi-driver Disable Register 223 PIO Multi-driver Status 223 PIO Pull Up Disable Register 224 PIO Pull Up Enable Register 224 PIO Pad Pull Up Status Register 225 PIO Peripheral A Select Register 225 PIO Peripheral B Select Register 226 PIO Peripheral AB Status Register 226 PIO Output Write Enable Register 227 PIO Output Write Disable Register 227 PIO Output Write Status Register 228 Serial Peripheral Interface SPI 229 Block 230 Application Block Diagram 231 Product 232 I/O 232 Power Management 232 Functional 232 Master Mode 232 SPI Slave Mode 237 Data Transfer 238 Serial Peripheral Interface SPI User Interface 240 SPI Control Register 241 SPI Mode Register 242 SPI Receive Data Register 244 SPI Transmit Data Register 244 SPI Status Register 245 SPI Interrupt Enable Register 246 viii AT91RM3400 AT91RM3400 SPI Interrupt Disable 247 SPI Interrupt Mask Register 248 SPI Chip Select 249 Two-wire Interface TWI 251 Block 251 Application Block Diagram 251 Product 252 I/O 252 Power Management 252 Functional 252 Transfer Format 252 Modes of 253 Transmitting 253 Read/Write 255 Two-wire Interface TWI User Interface 258 TWI Control 259 TWI Master Mode Register 260 TWI Internal Address Register 261 TWI Clock Waveform Generator 261 TWI Status Register 262 TWI Interrupt Enable 263 TWI Interrupt Disable Register 264 TWI Interrupt Mask Register 265 TWI Receive Holding Register 266 TWI Transmit Holding Register 266 AT91RM3400 Ordering Information 447 xiii Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel 41 26-426-5555 Fax 41 26-426-5500 Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel 852 2721-9778 Fax 852 2722-1369 Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel 81 3-3523-3551 Fax 81 3-3523-7581 Atmel Operations Memory 2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 436-4314 Microcontrollers 2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 436-4314 La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel 33 2-40-18-18-18 Fax 33 2-40-18-19-60 ASIC/ASSP/Smart Cards Zone Industrielle 13106 Rousset Cedex, France Tel 33 4-42-53-60-00 Fax 33 4-42-53-60-01 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 Tel 1 719 576-3300 Fax 1 719 540-1759 Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel 44 1355-803-000 Fax 44 1355-242-743 RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel 49 71-31-67-0 Fax 49 71-31-67-2340 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 Tel 1 719 576-3300 Fax 1 719 540-1759 Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France Tel 33 4-76-58-30-00 Fax 33 4-76-58-34-80 e-mail Web Site Disclaimer Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. Atmel Corporation All rights reserved. and combinations thereof and are the registered trademarks of Atmel Corporation or its subsidiaries. and are the registered trademarks and ARM9TDMI , ARM920T and AMBA are the trademarks of ARM Ltd. is a registered trademark of the CompactFlash Association SmartMedia is a trademark of the Solid State Floppy Disk Card Forum. Other terms and product names may be the trademarks of others. Printed on recycled paper.

PDF Datasheet Preview

• Incorporates the ARM7TDMI Processor Embedded ICE In-circuit Emulation, Debug Communication Channel Support
• 96K Bytes of Internal High-speed SRAM
• 256K Bytes of Internal High-speed ROM Integrating Default Boot Program

Downloads Application from External Storage Medium in Internal SRAM
• Memory Controller MC

Memory Protection Unit, Abort Status and Misalignment Detection
• Clock Generator and Power Management Controller PMC
3 to 20 MHz and 32 kHz On-chip Oscillators with Two PLLs Programmable Software Power Optimization Capabilities Four Programmable External Clock Signals
• Advanced Interrupt Controller AIC Thirty Individually Maskable, Eight-level Priority, Vectored Interrupt Sources Seven External Interrupt Sources and One Fast Interrupt Source, Spurious

Interrupt Protected
• Two 32-bit Parallel Input/Output Controllers PIO PIOA and PIOB

Sixty-three Programmable I/O Lines Multiplexed with up to Two Peripheral I/Os Input Change Interrupt Capability on Each I/O Line Individually Programmable Open-drain and Synchronous Output
• System Timer ST Including a 16-bit Counter, Watchdog and Second Counter
• Real Time Clock RTC with Alarm Interrupt
• Debug Unit DBGU , 2-wire USART and Support for Debug Communication Channel Programmable ICE Access Prevention
• Twenty Peripheral Data Controller PDC Channels
• USB Full-speed 12 Mbits per second Device Port UDP On-chip Transceiver 2-Kbyte Configurable FIFO for Loading and Storing Messages
• Multimedia Card Interface MCI Automatic Protocol Control and Fast Automatic Data Transfers with PDC MMC and SDCard Compliant, Support for up to two SDCards
• Three Synchronous Serial Controllers SSC Independent Clock and Frame Sync Signals for Each Receiver and Transmitter Analog Interface Support, Time Division Multiplex Support High-speed Continuous Data Stream Capabilities with 32-bit Data Transfer
• Four Universal Synchronous/Asynchronous Receiver Transmitters USART Individual Baud Rate Generator Support for ISO7816 T0/T1 Smart Card, Hardware and Software Handshaking,

RS485 Support Modem Control Lines on USART 1, IrDA Infrared Modulation/Demodulation
• Master/Slave Serial Peripheral Interface SPI 8- to 16-bit Programmable Data Length Four External Peripheral Chip Selects
• Two Three-channel 16-bit Timer/Counters TC Three External Clock Inputs, Two Multi-purpose I/O Pins per Channel Double PWM Generation, Capture/Waveform Mode, Up/Down Capability
• Two-wire Interface TWI Master Mode Support, All Two-wire Atmel EEPROMs Supported
• IEEE JTAG Boundary Scan on All Digital Pins
• Required Power Supplies 1.65V to 1.95V for VDDCORE, VDDOSC and VDDPLL 1.65V to 3.6V on VDDIO
• Fully Static Operation 0 Hz to 66 MHz up to 60 MIPS
• Available in a 100-lead LQFP Package

ARM7TDMI based Microcontroller

AT91RM3400

The AT91RM3400 is a fully integrated member of the Atmel advanced AT91 ARM microcontroller family. Having no external memory interface and equipped with embedded SRAM and ROM, it is ideal for numerous applications with medium memory requirements but which demand high performance.

Several options are available to download software to the internal SRAM. These include downloading from a serial EEPROM or serial or downloading through the USB Device Port. Additionally, customizing of the embedded ROM is available on request for large volume opportunities.

The Advanced Interrupt Controller AIC enhances the interrupt handling performance of the ARM7TDMI processor by providing multiple vectored, prioritized interrupt sources and reduces the cycles taken to transfer to an interrupt handler.

The Peripheral Data Controller PDC provides DMA channels for all the serial peripherals, enabling them to transfer data to or from on-chip memories without processor intervention. This reduces the processor overhead when dealing with transfers of continuous data streams.

The set of Parallel I/O PIO Controllers multiplex the peripheral input/output lines with general-purpose data I/Os, reducing the external pin count of the device and providing an interrupt and open drain capability on each line.

The Power Management Controller PMC keeps system power consumption to a minimum by selectively enabling and/or disabling the core and various peripherals under software control. It uses an enhanced clock generator to provide a selection of clock signals including a slow clock 32 kHz for power-saving mode.

The wide range of system interfaces includes USB V2.0 Full-speed Device Port, Multimedia Card, Serial Peripheral Interface SPI and Two-wire Interface TWI . Peripherals include multiple USARTs, Timer/Counters and Serial Synchronous Controllers SSC .

The AT91RM3400 includes an extensive set of peripherals that operate in accordance with several industry standards, such as those used in audio, communication, computer and smart card applications.
2 AT91RM3400

AT91RM3400

Block Diagram

Bold arrows

Figure AT91RM3400 Block Diagram

TST NRST

Reset and Test

JTAGSEL

TDI TDO TMS TCK

JTAG Scan
indicate master-to-slave dependency.

ARM7TDMI Processor

FIQ IRQ0-IRQ6 PCK0-PCK3

PLLRCB PLLRCA

XIN XOUT

XIN32 XOUT32

DRXD DTXD

DM DP

MCCK MCCDA MCDA0-MCDA3 MCCDB MCDB0-MCDB3

RXD0 TXD0 SCK0 RTS0 CTS0 RXD1 TXD1 SCK1 RTS1 CTS1 DSR1 DTR1 DCD1

RI1 RXD2 TXD2 SCK2 RTS2 CTS2 RXD3 TXD3 SCK3 RTS3 CTS3

Transceiver

PLLB PLLA
AT91RM3400 Ordering Information
Table Ordering Information Ordering Code

AT91RM3400-AI-001

Package LQFP 100

Temperature Operating Range Industrial -40°C to 85°C

AT91RM3400

Table of Contents
1 Description 2 Block 3 Key Features 4

ARM7TDMI Processor 4 Debug and 4 Boot ROM 4 Embedded Software Services 4 Reset Controller 4 Memory 4 Advanced Interrupt Controller 5 Power Management Controller 6 System Timer 6 Real-time Clock 6 Debug Unit 6 Parallel Input/Output 7 Serial Peripheral 7 Two-wire 8 USART 8 Serial Synchronous Controller 8 Timer Counter 8 Multimedia Card Interface 9 USB Device Port 9

AT91RM3400 Product Properties 11 Power Supplies 11 Mechanical Overview of the 100-lead LQFP 12 Peripheral Multiplexing on PIO Lines 13 PIO Controller A Multiplexing 13 PIO Controller B Multiplexing 15 Pin Name 16 Peripheral Identifiers 19 System 20 External 20 Product Memory 20 Internal Memory Mapping 20 Peripheral Mapping 21 Peripheral 23 USART 23 Timer Counter 23 USB Device Port 23

ARM7TDMI Processor Overview 25

ARM7TDMI Processor 26 Instruction 26 Data 26 ARM7TDMI Operating 26 ARM7TDMI Registers 26 ARM Instruction Set Overview 28 Thumb Instruction Set Overview 29

AT91RM3400 Debug and Test Features 31 Block 32 Application Examples 33 Debug Environment 33 Test Environment 33 Debug and Test Pin Description 34 Functional 34 Test Pin 34 Embedded In-circuit Emulator 34 Debug Unit 35 IEEE JTAG Boundary Scan 35 AT91RM3400 ID Code Register 42

Boot 43 Flow Diagram 44 45 Valid Image Detection 46 Structure of ARM Vector 6 47 Bootloader 48 Boot Uploader 52 External Communication Channels 52 Hardware and Software 54

Embedded Software Services 55 Service Definition 55 Service 55 Using a Service 56 Embedded Software Services 59 Definition 59 ROM Entry Service 59 Tempo Service 60 Xmodem 63 DataFlash 69 CRC Service 74
ii AT91RM3400

AT91RM3400

Sine Service 76

Reset 77 NRST Conditions 77 Reset Management 78 Recommended Features of the Reset Controller 78

Memory Controller 79 Block 80 Functional 81 Bus Arbiter 81 Address Decoder 81 Remap Command 82 Abort Status 83 Memory Protection 83 Misalignment Detector 84 AT91RM3400 Memory Controller MC User Interface 85 MC Remap Control Register 86 MC Abort Status Register 87 MC Abort Address Status Register 89 MC Protection Unit Area 0 to 15 Registers 90 MC Protection Unit 91 MC Protection Unit Enable Register 92

Peripheral Data Controller PDC 93 Block 93 Functional 94 Memory Pointers 94 Transfer Counters 94 Data Transfers 95 Priority of PDC Transfer Requests 95 Peripheral Data Controller PDC User Interface 96 PDC Receive Pointer Register 96 PDC Receive Counter Register 97 PDC Transmit Pointer Register 97 PDC Transmit Counter Register 97 PDC Receive Next Pointer Register 98 PDC Receive Next Counter Register 98 PDC Transmit Next Pointer Register 98 PDC Transmit Next Counter Register 99 PDC Transfer Control Register 99

PDC Transfer Status 100

Advanced Interrupt Controller AIC 101 Block 102 Application Block Diagram 102 AIC Detailed Block Diagram 102 I/O Line 103 Product 103 I/O 103 Power Management 103 Interrupt 103 Functional 104 Interrupt Source Control 104 Interrupt Latencies 106 Normal Interrupt 107 Fast 109 Protect 112 Spurious 113 General Interrupt Mask 113 Advanced Interrupt Controller AIC User Interface 114 AIC Source Mode Register 115 AIC Source Vector Register 115 AIC Interrupt Vector Register 116 AIC FIQ Vector 116 AIC Interrupt Status Register 117 AIC Interrupt Pending Register 117 AIC Interrupt Mask Register 118 AIC Core Interrupt Status Register 118 AIC Interrupt Enable Command 119 AIC Interrupt Disable Command Register 119 AIC Interrupt Clear Command Register 120 AIC Interrupt Set Command Register 120 AIC End of Interrupt Command Register 121 AIC Spurious Interrupt Vector Register 121 AIC Debug Control 122 AIC Fast Forcing Enable 123 AIC Fast Forcing Disable Register 123 AIC Fast Forcing Status 124

Power Management Controller PMC 125 Block 126 Product 127 I/O 127
iv AT91RM3400

AT91RM3400
127 Oscillator and PLL Characteristics 127 Peripheral Clocks 127 USB Clocks 127 Functional 128 Operating Modes 128 Clock Definitions 128 Clock Generator 128 Slow Clock Oscillator 129 Main Oscillator 130 Divider and PLL Blocks 132 Clock Controllers 133 Clock Switching Details 137 Master Clock Switching Timings 137 Clock Switching 138 Power Management Controller PMC User Interface 140 PMC System Clock Enable 141 PMC System Clock Disable Register 142 PMC System Clock Status 143 PMC Peripheral Clock Enable Register 144 PMC Peripheral Clock Disable Register 144 PMC Peripheral Clock Status Register 145 PMC Clock Generator Main Oscillator Register 146 PMC Clock Generator Main Clock Frequency Register 147 PMC Clock Generator PLL A Register 148 PMC Clock Generator PLL B Register 149 PMC Master Clock Register 150 PMC Programmable Clock Register 0 to 3 151 PMC Interrupt Enable Register 152 PMC Interrupt Disable Register 152 PMC Status 153 PMC Interrupt Mask Register 154

System Timer ST 155 Block 155 Application Block Diagram 155 Product 156 Power Management 156 Interrupt 156 Watchdog Overflow 156 Functional 156 System Timer Clock 156 Period Interval Timer PIT 156 Watchdog Timer WDT 157 Real-time Timer RTT 157

System Timer ST User Interface 159 ST Control 159 ST Period Interval Mode Register 160 ST Watchdog Mode Register 160 ST Real-Time Mode 161 ST Status Register 161 ST Interrupt Enable 162 ST Interrupt Disable Register 162 ST Interrupt Mask Register 163 ST Real-time Alarm Register 163 ST Current Real-Time 164

Real Time Clock RTC 165 Block 165 Product 165 Power Management 165 Functional 166 Reference 166 Timing 166 Error Checking 166 Updating Time/Calendar 167 Real Time Clock RTC User Interface 168 RTC Control Register 169 RTC Mode Register 170 RTC Time Register 170 RTC Calendar 171 RTC Time Alarm Register 172 RTC Calendar Alarm Register 173 RTC Status Register 174 RTC Status Clear Command Register 175 RTC Interrupt Enable Register 176 RTC Interrupt Disable Register 177 RTC Interrupt Mask Register 178 RTC Valid Entry Register 179

Debug Unit DBGU 181 Block 182 Product 183 I/O 183 Power Management 183 Interrupt Source 183
vi AT91RM3400

AT91RM3400

UART 183 Baud Rate Generator 183 Receiver 184 Transmitter 186 Peripheral Data 187 Test Modes 187 Debug Communication Channel 189 Chip Identifier 189 ICE Access Prevention 189

Debug Unit User Interface 190 Debug Unit Control Register 191 Debug Unit Mode Register 192 Debug Unit Interrupt Enable Register 193 Debug Unit Interrupt Disable Register 194 Debug Unit Interrupt Mask Register 195 Debug Unit Status 196 Debug Unit Receiver Holding Register 198 Debug Unit Baud Rate Generator 199 Debug Unit Chip ID Register 200 Debug Unit Chip ID Extension Register 202 Debug Unit Force NTRST 202

Parallel Input/Output Controller PIO 203 Block 204 Product 205 Pin Multiplexing 205 External Interrupt Lines 205 Power Management 205 Interrupt Generation 205 Functional 206 Pull-up Resistor Control 207 I/O Line or Peripheral Function Selection 207 Peripheral A or B Selection 207 Output 207 Synchronous Data 208 Multi Drive Control Open Drain 208 Output Line Timings 208 Inputs 209 Input Glitch Filtering 209 Input Change Interrupt 210 I/O Lines Programming Example 211 Parallel Input/Output Controller PIO User 212 PIO Enable Register 214 PIO Disable 214 PIO Status Register 215

PIO Output Enable 215 PIO Output Disable Register 216 PIO Output Status 216 PIO Input Filter Enable Register 217 PIO Input Filter Disable 217 PIO Input Filter Status Register 218 PIO Set Output Data Register 218 PIO Clear Output Data 219 PIO Output Data Status Register 219 PIO Pin Data Status 220 PIO Interrupt Enable Register 220 PIO Interrupt Disable Register 221 PIO Interrupt Mask 221 PIO Interrupt Status Register 222 PIO Multi-driver Enable 222 PIO Multi-driver Disable Register 223 PIO Multi-driver Status 223 PIO Pull Up Disable Register 224 PIO Pull Up Enable Register 224 PIO Pad Pull Up Status Register 225 PIO Peripheral A Select Register 225 PIO Peripheral B Select Register 226 PIO Peripheral AB Status Register 226 PIO Output Write Enable Register 227 PIO Output Write Disable Register 227 PIO Output Write Status Register 228

Serial Peripheral Interface SPI 229 Block 230 Application Block Diagram 231 Product 232 I/O 232 Power Management 232 Functional 232 Master Mode 232 SPI Slave Mode 237 Data Transfer 238 Serial Peripheral Interface SPI User Interface 240 SPI Control Register 241 SPI Mode Register 242 SPI Receive Data Register 244 SPI Transmit Data Register 244 SPI Status Register 245 SPI Interrupt Enable Register 246
viii AT91RM3400

AT91RM3400

SPI Interrupt Disable 247 SPI Interrupt Mask Register 248 SPI Chip Select 249

Two-wire Interface TWI 251 Block 251 Application Block Diagram 251 Product 252 I/O 252 Power Management 252 Functional 252 Transfer Format 252 Modes of 253 Transmitting 253 Read/Write 255 Two-wire Interface TWI User Interface 258 TWI Control 259 TWI Master Mode Register 260 TWI Internal Address Register 261 TWI Clock Waveform Generator 261 TWI Status Register 262 TWI Interrupt Enable 263 TWI Interrupt Disable Register 264 TWI Interrupt Mask Register 265 TWI Receive Holding Register 266 TWI Transmit Holding Register 266
AT91RM3400 Ordering Information 447
xiii

Atmel Corporation
2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 487-2600

Regional Headquarters

Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel 41 26-426-5555 Fax 41 26-426-5500

Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel 852 2721-9778 Fax 852 2722-1369

Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel 81 3-3523-3551 Fax 81 3-3523-7581

Atmel Operations

Memory 2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 436-4314

Microcontrollers 2325 Orchard Parkway San Jose, CA 95131 Tel 1 408 441-0311 Fax 1 408 436-4314

La Chantrerie BP 70602 44306 Nantes Cedex 3, France Tel 33 2-40-18-18-18 Fax 33 2-40-18-19-60

ASIC/ASSP/Smart Cards Zone Industrielle 13106 Rousset Cedex, France Tel 33 4-42-53-60-00 Fax 33 4-42-53-60-01
1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 Tel 1 719 576-3300 Fax 1 719 540-1759

Scottish Enterprise Technology Park Maxwell Building East Kilbride G75 0QR, Scotland Tel 44 1355-803-000 Fax 44 1355-242-743

RF/Automotive Theresienstrasse 2 Postfach 3535 74025 Heilbronn, Germany Tel 49 71-31-67-0 Fax 49 71-31-67-2340 1150 East Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 Tel 1 719 576-3300 Fax 1 719 540-1759

Biometrics/Imaging/Hi-Rel MPU/ High Speed Converters/RF Datacom

Avenue de Rochepleine BP 123 38521 Saint-Egreve Cedex, France Tel 33 4-76-58-30-00 Fax 33 4-76-58-34-80
e-mail Web Site

Disclaimer Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual property of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems.

Atmel Corporation All rights reserved. and combinations thereof and are the registered trademarks of Atmel Corporation or its subsidiaries.
and are the registered trademarks and ARM9TDMI , ARM920T and AMBA are the trademarks of ARM Ltd. is a registered trademark of the CompactFlash Association SmartMedia is a trademark of the Solid State Floppy Disk Card Forum.

Other terms and product names may be the trademarks of others.

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Datasheet ID: AT91RM3400-AU-002 519127