AT45DB321C
Part | Datasheet |
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AT45DB321C-TC (pdf) |
Related Parts | Information |
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AT45DB321C-RC |
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AT45DB321C-RU |
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AT45DB321C-CNC |
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AT45DB321C-CI |
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AT45DB321C-CC |
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AT45DB321C-CNU |
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AT45DB321C-TU |
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AT45DB321C-CU |
PDF Datasheet Preview |
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• Single - 3.6V Supply • RapidS Serial Interface 40 MHz Maximum Clock Frequency SPI Modes 0 and 3 Compatible for Frequencies Up to 33 MHz • Page Program 8192 Pages 528 Bytes/Page • Automated Erase Operations Page Erase 528 Bytes Block Erase 4,224 Bytes • Two 528-byte SRAM Data Buffers Allows Receiving of Data while Reprogramming the Flash Array • Continuous Read Capability through Entire Array Ideal for Code Shadowing Applications • Low-power Dissipation 10 mA Active Read Current Typical 6 µA Standby Current Typical • Hardware and Software Data Protection Features Individual Sector Locking • Security 128-byte Security Register 64-byte User Programmable Space Unique 64-byte Device Identifier • JEDEC Standard Manufacturer and Device ID Read • 100,000 Program/Erase Cycles per Page Minimum • Data Retention 20 years • Commercial and Industrial Temperature Ranges • Green Pb/Halide-free/RoHS Compliant Packaging Options 32-megabit volt AT45DB321C For New Designs Use AT45DB321D The AT45DB321C is an SPI compatible, serial-interface Flash memory ideally suited for a wide variety of digital voice-, image-, program code- and datastorage applications. The AT45DB321C supports a 4-wire serial interface known as RapidS for applications requiring very high speed operations. Its 34,603,008 bits of memory are organized as 8192 pages of 528 bytes each. In addition to the 33-megabit main memory, the AT45DB321C also contains two SRAM buffers of 528 bytes each. The buffers allow the receiving of data while a page in the main page Memory is being reprogrammed, as well as writing a continuous data stream. EEPROM emulation bit or byte alterability is easily handled with a self-contained three step read-modify-write operation. Unlike conventional Flash memories that are accessed randomly with multiple address lines and a parallel interface, the DataFlash uses a RapidS serial interface to sequentially access its data. The simple sequential access dramatically reduces active pin count, facilitates hardware layout, increases system reliability, minimizes switching noise, and reduces package size. The device is optimized for use in many commercial and industrial applications where high-density, low-pin count, lowvoltage and low-power are essential. The device operates at clock frequencies up to 40 MHz with a typical active read current consumption of 10 mA. To allow for simple in-system reprogrammability, the AT45DB321C does not require high input voltages for programming. The device operates from a single power supply, 2.7V to 3.6V, for both the program and read operations. The AT45DB321C is enabled through the chip select pin CS and accessed via a three-wire interface consisting of the Serial Input SI , Serial Output SO , and the Serial Clock SCK . All programming and erase cycles are self-timed. Pin Configurations and Packages Table Pin Configurations Pin Name Function Chip Select Serial Clock Serial Input Serial Output Hardware Page Write Protect Pin RESET Chip Reset RDY/BUSY Ready/Busy Figure RDY/BUSY 1 RESET 2 WP 3 NC 4 NC 5 VCC 6 GND 7 NC 8 NC 9 NC 10 CS 11 SCK 12 SI 13 SO 14 TSOP Top View Type 1 Figure CBGA Top View 28 NC through Package 27 NC 26 NC 25 NC 12345 24 NC 23 NC 22 NC 21 NC 20 NC 19 NC 18 NC 17 NC 16 NC 15 NC B NC SCK GND VCC NC C NC CS RDY/BSY WP NC D NC SO SI RESET NC Figure SOIC Top View RESET RDY/BUSY Ordering Information fSCK MHz ICC mA Active Standby Ordering Code AT45DB321C-CC AT45DB321C-CNC AT45DB321C-TC AT45DB321C-CI AT45DB321C-TI Package 24C3 8CN3 28T 24C3 28T Operation Range Commercial 0° C to 70° C Industrial -40° C to 85° C Green Package Options Pb /Halide-free/RoHS Compliant fSCK MHz ICC mA Active Standby Ordering Code Package AT45DB321C-CU AT45DB321C-CNU AT45DB321C-TU 24C3 8CN3 28T Operation Range Industrial -40° C to 85° C Legacy Package Options 1 fSCK MHz ICC mA Active Standby Ordering Code AT45DB321C-RC AT45DB321C-RU Note Not recommended for new designs. Package 28R Operation Range Commercial 0° C to 70° C Industrial -40° C to 85° C 24C3 8CN3 28T 28R Package Type 24-ball 5 x 5 Array , mm Pitch, 6 x 8 x mm, Plastic Chip-scale Ball Grid Array CBGA 8-pad 6 mm x 8 mm Chip Array Small Outline No Lead Package CASON 28-lead, Plastic Thin Small Outline Package TSOP 28-lead, Wide, Plastic Gull Wing Small Outline Package SOIC 34 AT45DB321C Packaging Information 24C3 CBGA AT45DB321C A1 Ball ID Top View A1 Ball Corner A B C D E 5 432 1 Øb Bottom View Side View COMMON DIMENSIONS Unit of Measure = mm SYMBOL E E1 D D1 A A1 e b NOM TYP BSC TYP NOTE TITLE 2325 Orchard Parkway 24C3, 24-ball 5 x 5 Array , mm Pitch, 6 x 8 x mm, R San Jose, CA 95131 Chip-scale Ball Grid Array Package CBGA 9/10/04 24C3 8CN3 CASON Marked Pin1 Indentifier Top View Side View mm TYP 8 Pin1 Pad Corner Bottom View All dimensions and tolerance conform to ASME Y 14.5M, The surface finish of the package shall be EDM Charmille Unless otherwise specified tolerance Decimal Angular ±2o. Metal Pad Dimensions. SYMBOL A A1 b D E e1 L L1 COMMON DIMENSIONS Unit of Measure = mm MIN NOM MAX NOTE 4 2325 Orchard Parkway R San Jose, CA 95131 |
More datasheets: CY7C1441AV33-133AXCT | 3634 | AT45DB321C-RC | AT45DB321C-RU | AT45DB321C-CNC | AT45DB321C-CI | AT45DB321C-CC | AT45DB321C-CNU | AT45DB321C-TU | AT45DB321C-CU |
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