AT29LV1024-15JI

AT29LV1024-15JI Datasheet


The AT29LV1024 is a 3-volt only in-system Flash programmable and erasable read only memory PEROM . Its 1 megabit of memory is organized as 65,536 words by 16 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers access times to 150 ns with power dissipation of just 54 mW. When the device is deselected, the CMOS standby current is less than 50 µA. The device endurance is

Part Datasheet
AT29LV1024-15JI AT29LV1024-15JI AT29LV1024-15JI (pdf)
Related Parts Information
AT29LV1024-15TI AT29LV1024-15TI AT29LV1024-15TI
AT29LV1024-15JC AT29LV1024-15JC AT29LV1024-15JC
AT29LV1024-15TC AT29LV1024-15TC AT29LV1024-15TC
AT29LV1024-20TC AT29LV1024-20TC AT29LV1024-20TC
AT29LV1024-20JC AT29LV1024-20JC AT29LV1024-20JC
AT29LV1024-20JI AT29LV1024-20JI AT29LV1024-20JI
AT29LV1024-20TI AT29LV1024-20TI AT29LV1024-20TI
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• Single Voltage Range, 3V to 3.6V Supply
• 3-volt Only Read and Write Operation
• Software Protected Programming
• Fast Read Access Time - 150 ns
• Low Power Dissipation
15 mA Active Current 50 µA CMOS Standby Current
• Sector Program Operation Single-cycle Reprogram Erase and Program 512 Sectors 128 words/sector Internal Address and Data Latches for 128 Words
• Fast Sector Program Cycle Time - 20 ms
• Internal Program Control and Timer
• DATA Polling for End of Program Detection
• Typical Endurance > 10,000 Cycles
• CMOS and TTL Compatible Inputs and Outputs
• Commercial and Industrial Temperature Ranges

The AT29LV1024 is a 3-volt only in-system Flash programmable and erasable read only memory PEROM . Its 1 megabit of memory is organized as 65,536 words by 16 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers access times to 150 ns with power dissipation of just 54 mW. When the device is deselected, the CMOS standby current is less than 50 µA. The device endurance is
continued

Pin Configurations

Pin Name A0 - A15 CE OE WE I/O0 - I/O15 NC DC

Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect Don’t Connect

PLCC Top View
6 I/O13 5 I/O14 4 I/O15 3 CE 2 NC 1 NC 44 VCC 43 WE 42 NC 41 A15 40 A14

I/O12 7 I/O11 8 I/O10 9

I/O9 10 I/O8 11 GND 12 NC 13 I/O7 14 I/O6 15 I/O5 16 I/O4 17
39 A13 38 A12 37 A11 36 A10 35 A9 34 GND 33 NC 32 A8 31 A7 30 A6 29 A5

TSOP Top View Type 1

NC 1 A0 2 A1 3 A2 4 A3 5 A4 6 A5 7 NC 8 A6 9 A7 10 A8 11 VSS 12 A9 13 A10 14 A11 15 NC 16 A12 17 A13 18 A14 19 A15 20 NC 21 WE 22 VCC 23 NC 24
48 NC 47 OE 46 O0 45 O1 44 O2 43 O3 42 O4 41 NC 40 O5 39 O6 38 O7 37 VSS 36 O8 35 O9 34 O10 33 NC 32 O11 31 O12 30 O13 29 O14 28 O15 27 CE 26 NC 25 NC
1-megabit 64K x 16 3-volt Only Flash Memory AT29LV1024

I/O3 18 I/O2 19 I/O1 20 I/O0 21 OE 22 DC 23

A0 24 A1 25 A2 26 A3 27 A4 28
such that any sector can typically be written to in excess of 10,000 times.

To allow for simple in-system reprogrammability, the AT29LV1024 does not require high input voltages for programming. Three-volt-only commands determine the operation of the device. Reading data out of the device is similar to reading from an EPROM. Reprogramming the AT29LV1024 is performed on a sector basis 128 words of data are loaded into the device and then simultaneously programmed.

Block Diagram

During a reprogram cycle, the address locations and 128 words of data are internally latched, freeing the address and data bus for other operations. Following the initiation of a program cycle, the device will automatically erase the sector and then program the latched data using an internal control timer. The end of a program cycle can be detected by DATA polling of I/O7 or I/O15. Once the end of a program cycle has been detected, a new access for a read or program can begin.

Device Operation

READ The AT29LV1024 is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE or OE is high. This dual-line control gives designers flexibility in preventing bus contention.

SOFTWARE DATA PROTECTION PROGRAMMING The AT29LV1024 has 512 individual sectors, each 128 words. Using the software data protection feature, word loads are used to enter the 128 words of a sector to be programmed. The AT29LV1024 can only be programmed or reprogrammed using the software data protection feature. The device is programmed on a sector basis. If a word of data within the sector is to be changed, data for the entire 128 word sector must be loaded into the device. The AT29LV1024 automatically does a sector erase prior to loading the data into the sector. An erase command is not required.

Software data protection protects the device from inadvertent programming. A series of three program commands to specific addresses with specific data must be presented to the device before programming may occur. The same three program commands must begin each program operation. All software program commands must obey the sector program timing specifications. Power transitions will not reset the software data protection feature, however the software
feature will guard against inadvertent program cycles during power transitions.

Any attempt to write to the device without the 3-word command sequence will start the internal write timers. No data will be written to the device however, for the duration of tWC, a read operation will effectively be a polling operation.

After the software data protection’s 3-word command code is given, a word load is performed by applying a low pulse on the WE or CE input with CE or WE low respectively and OE high. The address is latched on the falling edge of CE or WE, whichever occurs last. The data is latched by the first rising edge of CE or WE.

The 128 words of data must be loaded into each sector. Any word that is not loaded during the programming of its sector will be erased to read FFFFH. Once the words of a sector are loaded into the device, they are simultaneously programmed during the internal programming period. After the first data word has been loaded into the device, successive words are entered in the same manner. Each new word to be programmed must have its high to low transition on WE or CE within 150 µs of the low to high transition of WE or CE of the preceding word. If a high to low transition is not detected within 150 µs of the last low to high transition, the load period will end and the internal programming period will start. A7 to A15 specify the sector address. The sector address must be valid during each high to low transi-

AT29LV1024

AT29LV1024
tion of WE or CE . A0 to A6 specify the word address within the sector. The words may be loaded in any order sequential loading is not required. Once a programming operation has been initiated, and for the duration of tWC, a read operation will effectively be a polling operation.

HARDWARE DATA PROTECTION Hardware features protect against inadvertent programs to the AT29LV1024 in the following ways a VCC is below 1.8V typical , the program function is inhibited b VCC power on VCC has reached the VCC sense level, the device will automatically time out 10 ms typical before programming c Program any one of OE low, CE high or WE high inhibits program cycles and d Noise of less than 15 ns typical on the WE or CE inputs will not initiate a program cycle.

INPUT LEVELS While operating with a 3.3V ±10% power supply, the address inputs and control inputs OE, CE and WE may be driven from 0 to 5.5V without adversely affecting the operation of the device. The I/O lines can be driven from 0 to 3.6V.

PRODUCT IDENTIFICATION The product identification mode identifies the device and manufacturer as Atmel. It may be accessed by hardware or software operation. The hardware operation mode can be used by an external programmer to identify the correct programming algorithm for the Atmel product. In addition, users may wish to use the software product identification mode to identify the part i.e. using the device code , and have the system software use the appropriate sector size for program operations. In this
manner, the user can have a common board design for various Flash densities and, with each density’s sector size in a memory map, have the system software apply the appropriate sector size.

For details, see Operating Modes for hardware operation or Software Product Identification. The manufacturer and device code is the same for both modes.

DATA POLLING The AT29LV1024 features DATA polling to indicate the end of a program cycle. During a program cycle an attempted read of the last word loaded will result in the complement of the loaded data on I/O7 and I/O15. Once the program cycle has been completed, true data is valid on all outputs and the next cycle may begin. DATA polling may begin at any time during the program cycle.

TOGGLE BIT In addition to DATA polling the AT29LV1024 provides another method for determining the end of a program or erase cycle. During a program or erase operation, successive attempts to read data from the device will result in I/O6 and I/O14 toggling between one and zero. Once the program cycle has completed, I/O6 and I/O14 will stop toggling and valid data will be read. Examining the toggle bit may begin at any time during a program cycle.

OPTIONAL CHIP ERASE MODE The entire device can be erased by using a 6-byte software code. Please see Software Chip Erase application note for details.
Ordering Information
tACC

ICC mA

Active Standby
Ordering Code

AT29LV1024-15JC AT29LV1024-15TC

AT29LV1024-15JI AT29LV1024-15TI

AT29LV1024-20JC AT29LV1024-20TC

AT29LV1024-20JI AT29LV1024-20TI

AT29LV1024-25JC AT29LV1024-25TC

AT29LV1024-25JI AT29LV1024-25TI

Package
44J 48T
44J 48T
44J 48T
44J 48T
44J 48T
44J 48T

Operation Range

Commercial 0° to 70°C

Industrial -40° to 85°C

Commercial 0° to 70°C

Industrial -40° to 85°C

Commercial 0° to 70°C

Industrial -40° to 85°C
44J 48T

Package Type 44-lead, Plastic J-Leaded Chip Carrier PLCC 48-lead, Thin Small Outline Package TSOP

AT29LV1024

Packaging Information
44J, 44-lead, Plastic J-Leaded Chip Carrier PLCC Dimensions in Inches and Millimeters PLCC

JEDEC STANDARD MS-018 AC

X 45° PIN NO. 1 IDENTIFY

X 30° - 45°
.650 16.5 SQ
.685 17.4 SQ

REF SQ

X 45° MAX 3X

AT29LV1024
48T, 48-lead, Plastic Thin Small Outline Package TSOP Dimensions in Millimeters and Inches *

JEDEC OUTLINE MO-142 DD
*Controlling dimension millimeters

Atmel Headquarters

Corporate Headquarters 2325 Orchard Parkway San Jose, CA 95131 TEL 408 441-0311 FAX 408 487-2600

Europe Atmel U.K., Ltd. Coliseum Business Centre Riverside Way Camberley, Surrey GU15 3YL England TEL 44 1276-686-677 FAX 44 1276-686-697

Asia Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL 852 2721-9778 FAX 852 2722-1369
More datasheets: 74AC253SCX | ROB0142 | ROB0143 | SJ3252 | SJ3261 | MV6451 | MV6951 | MV6351 | AT29LV1024-15TI | AT29LV1024-15JC


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Datasheet ID: AT29LV1024-15JI 519006