AT25FS010N-SH27-B

AT25FS010N-SH27-B Datasheet

AT25FS010

Part	Datasheet
AT25FS010N-SH27-B	AT25FS010N-SH27-B (pdf)

Related Parts	Information
AT25FS010N-SH27-T	AT25FS010N-SH27-T
AT25FS010Y7-YH27-T	AT25FS010Y7-YH27-T

PDF Datasheet Preview
• Serial Peripheral Interface SPI Compatible • Supports SPI Modes 0,0 and 3 1,1 Datasheet describes Mode 0 Operation • 50 MHz Clock Rate • Byte Mode and Page Mode Program 1 to 256 Bytes Operations • Sector/Block/Page Architecture 256 byte Pages per Sector Eight 4 Kbyte Sectors per Block Four uniform 32 Kbyte Blocks • Self-timed Sector, Block and Chip Erase • Product Identification Mode with JEDEC Standard • Low-voltage Operation 2.7V VCC = 2.7V to 3.6V • Hardware and Software Write Protection Device protection with Write Protect WP Pin Write Enable and Write Disable Instructions Software Write Protection: • Upper 1/32, 1/16, 1/8, 1/4, 1/2 or Entire Array • Flexible Op Codes for Maximum Compatibility • Self-timed Program Cycle 30 µs/Byte Typical • Single Cycle Reprogramming Erase and Program for Status Register • High Reliability Endurance 10,000 Write Cycles Typical • 8-lead JEDEC 150mil SOIC and 8-lead Ultra Thin Small Array Package SAP • Die Sales Waffer Form, Tape and Reel, and Bumped Waffers High Speed Small Sectored SPI Flash Memory 1M 131,072 x 8 AT25FS010 The AT25FS010 provides 1,048,576 bits of serial reprogrammable Flash memory organized as 131,072 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT25FS010 is available in a space-saving 8-lead JEDEC SOIC and 8-lead Ultra Thin SAP packages. Table Pin Name CS SCK SI Pin Configuration Function Chip Select Serial Data Clock Serial Data Input 8-lead JEDEC SOIC CS 1 SO 2 WP 3 GND 4 8 VCC 7 HOLD 6 SCK 5 SI SO GND VCC WP HOLD Serial Data Output Ground Power Supply Write Protect Suspends Serial Input 8-lead SAP __V_C_C_ 8 HOLD 7 SCK 6 2 _S_O_ 4 GND Bottom View The AT25FS010 is enabled through the Chip Select pin CS and accessed via a 3-wire interface consisting of Serial Data Input SI , Serial Data Output SO , and Serial Clock SCK . All write cycles are completely self-timed. BLOCK WRITE protection for upper 1/32, 1/16, 1/8, 1/4, 1/2 or the entire memory array is enabled by programming the status register. Separate write enable and write disable instructions are provided for additional data protection. Hardware data protection is provided via the WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence. Absolute Maximum Ratings* Operating to +85°C Storage Temperature to +150°C Voltage on Any Pin with Respect to Ground to +5.0V Maximum Operating Voltage 4.2V DC Output mA NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Figure Block Diagram 131,072 x 8 2 AT25FS010 AT25FS010 Table Pin Capacitance 1 Applicable over recommended operating range from TA = 25°C, f = MHz, VCC = +3.6V unless otherwise noted Symbol Test Conditions Units Conditions COUT Ordering Information Ordering Code AT25FS010N-SH27-B 1 AT25FS010N-SH27-T 2 AT25FS010Y7-YH27-T 2 Package 8S1 8Y7 Notes “-B” designates bulk ordering code. “-T” designates tape and reel ordering code. SOIC=4K per reel and SAP=3K per reel. Operation Range Lead-Free/Halogen-Free/ NiPdAu Lead Finish Industrial Temperature to 85°C Package Type 8S1 8-lead, Wide, Plastic Gull Wing Small outline JEDEC SOIC 8Y7 8-lead, mm x mm Body, Ultra Thin, Dual Footprint, Non-leaded, Small Array Package SAP Options Low Voltage 2.7V to 3.6V Part marking scheme 8-SOIC TOP MARK Seal Year \| Seal Week \|\|\| \|---\|---\|---\|---\|---\|---\|---\|---\| ATMLHYWW \|---\|---\|---\|---\|---\|---\|---\|---\| \|---\|---\|---\|---\|---\|---\|---\|---\| Lot Number \|---\|---\|---\|---\|---\|---\|---\|---\| \| Pin 1 Indicator Dot Y = SEAL YEAR 6 2006 0 2010 7 2007 8 2008 9 2009 1 2011 2 2012 3 2013 WW = SEAL WEEK 02 = Week 2 04 = Week 4 : ::: : ::: : 50 = Week 50 52 = Week 52 Lot Number to Use ALL Characters in Marking BOTTOM MARK No Bottom Mark 8-Ultra Thin SAP TOP MARK Seal Year \| Seal Week \|---\|---\|---\|---\|---\|---\|---\|---\| ATMLHYWW \|---\|---\|---\|---\|---\|---\|---\|---\| \|---\|---\|---\|---\|---\|---\|---\|---\| Lot Number \|---\|---\|---\|---\|---\|---\|---\|---\| Pin 1 Indicator Dot Y = SEAL YEAR 6 2006 0 2010 7 2007 1 2011 8 2008 2 2012 9 2009 3 2013 WW = SEAL WEEK 02 = Week 2 04 = Week 4 : ::: : ::: : 50 = Week 50 52 = Week 52 BOTTOM MARK No Bottom Mark 20 AT25FS010 Package Information 8S1 JEDEC SOIC AT25FS010 TOP VIEW Added Die Sales Info to Features Added lines to Ordering Codes table Updated to new Template Added Part Marking tables Changed ‘Advance Information’ to Preliminary Changed ‘BLOCK ERASE 1 ’ operation from 64kbyte to 32kbyte on page Initial document release. Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel 1 408 441-0311 Fax 1 408 487-2600 International Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel 852 2721-9778 Fax 852 2722-1369 Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel 33 1-30-60-70-00 Fax 33 1-30-60-71-11 Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel 81 3-3523-3551 Fax 81 3-3523-7581 Product Contact Web Site Literature Requests Technical Support Sales Contact Disclaimer The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life. 2009 Atmel Corporation. All rights reserved. Atmel logo and combinations thereof and others, are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others.

PDF Datasheet Preview

• Serial Peripheral Interface SPI Compatible
• Supports SPI Modes 0,0 and 3 1,1

Datasheet describes Mode 0 Operation
• 50 MHz Clock Rate
• Byte Mode and Page Mode Program 1 to 256 Bytes Operations
• Sector/Block/Page Architecture
256 byte Pages per Sector Eight 4 Kbyte Sectors per Block Four uniform 32 Kbyte Blocks
• Self-timed Sector, Block and Chip Erase
• Product Identification Mode with JEDEC Standard
• Low-voltage Operation 2.7V VCC = 2.7V to 3.6V
• Hardware and Software Write Protection Device protection with Write Protect WP Pin Write Enable and Write Disable Instructions Software Write Protection:
• Upper 1/32, 1/16, 1/8, 1/4, 1/2 or Entire Array
• Flexible Op Codes for Maximum Compatibility
• Self-timed Program Cycle
30 µs/Byte Typical
• Single Cycle Reprogramming Erase and Program for Status Register
• High Reliability

Endurance 10,000 Write Cycles Typical
• 8-lead JEDEC 150mil SOIC and 8-lead Ultra Thin Small Array Package SAP
• Die Sales Waffer Form, Tape and Reel, and Bumped Waffers

High Speed Small Sectored SPI Flash Memory
1M 131,072 x 8

AT25FS010

The AT25FS010 provides 1,048,576 bits of serial reprogrammable Flash memory organized as 131,072 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT25FS010 is available in a space-saving 8-lead JEDEC SOIC and 8-lead Ultra Thin SAP packages.

Table Pin Name CS SCK SI

Pin Configuration Function Chip Select Serial Data Clock Serial Data Input
8-lead JEDEC SOIC

CS 1 SO 2 WP 3 GND 4
8 VCC 7 HOLD 6 SCK 5 SI

SO GND VCC WP

HOLD

Serial Data Output Ground Power Supply Write Protect Suspends Serial Input
8-lead SAP
__V_C_C_ 8

HOLD 7

SCK 6
2 _S_O_
4 GND

Bottom View

The AT25FS010 is enabled through the Chip Select pin CS and accessed via a 3-wire interface consisting of Serial Data Input SI , Serial Data Output SO , and Serial Clock SCK . All write cycles are completely self-timed.

BLOCK WRITE protection for upper 1/32, 1/16, 1/8, 1/4, 1/2 or the entire memory array is enabled by programming the status register. Separate write enable and write disable instructions are provided for additional data protection. Hardware data protection is provided via the WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence.

Absolute Maximum Ratings*

Operating to +85°C Storage Temperature to +150°C Voltage on Any Pin with Respect to Ground to +5.0V Maximum Operating Voltage 4.2V DC Output mA
*NOTICE:

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

Figure Block Diagram
131,072 x 8
2 AT25FS010

AT25FS010

Table Pin Capacitance 1

Applicable over recommended operating range from TA = 25°C, f = MHz, VCC = +3.6V unless otherwise noted

Symbol Test Conditions

Units

Conditions

COUT
Ordering Information
Ordering Code AT25FS010N-SH27-B 1 AT25FS010N-SH27-T 2 AT25FS010Y7-YH27-T 2

Package 8S1 8Y7
Notes “-B” designates bulk ordering code. “-T” designates tape and reel ordering code. SOIC=4K per reel and SAP=3K per reel.

Operation Range

Lead-Free/Halogen-Free/ NiPdAu Lead Finish

Industrial Temperature to 85°C

Package Type 8S1 8-lead, Wide, Plastic Gull Wing Small outline JEDEC SOIC 8Y7 8-lead, mm x mm Body, Ultra Thin, Dual Footprint, Non-leaded, Small Array Package SAP

Options Low Voltage 2.7V to 3.6V

Part marking scheme
8-SOIC

TOP MARK

Seal Year | Seal Week
||| |---|---|---|---|---|---|---|---|

ATMLHYWW
|---|---|---|---|---|---|---|---|
|---|---|---|---|---|---|---|---| * Lot Number
|---|---|---|---|---|---|---|---| |

Pin 1 Indicator Dot

Y = SEAL YEAR 6 2006 0 2010
7 2007 8 2008 9 2009
1 2011 2 2012 3 2013

WW = SEAL WEEK 02 = Week 2 04 = Week 4 : ::: : ::: : 50 = Week 50 52 = Week 52

Lot Number to Use ALL Characters in Marking

BOTTOM MARK

No Bottom Mark
8-Ultra Thin SAP

TOP MARK

Seal Year
| Seal Week
|---|---|---|---|---|---|---|---|

ATMLHYWW
|---|---|---|---|---|---|---|---|
|---|---|---|---|---|---|---|---|

Lot Number
|---|---|---|---|---|---|---|---|

Pin 1 Indicator Dot

Y = SEAL YEAR 6 2006 0 2010 7 2007 1 2011 8 2008 2 2012 9 2009 3 2013

WW = SEAL WEEK 02 = Week 2 04 = Week 4 : ::: : ::: : 50 = Week 50 52 = Week 52

BOTTOM MARK No Bottom Mark
20 AT25FS010

Package Information 8S1 JEDEC SOIC

AT25FS010

TOP VIEW
Added Die Sales Info to Features Added lines to Ordering Codes table Updated to new Template Added Part Marking tables

Changed ‘Advance Information’ to Preliminary Changed ‘BLOCK ERASE 1 ’ operation from 64kbyte to 32kbyte on page

Initial document release.

Headquarters

Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel 1 408 441-0311 Fax 1 408 487-2600

International

Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel 852 2721-9778 Fax 852 2722-1369

Atmel Europe Le Krebs 8, Rue Jean-Pierre Timbaud BP 309 78054 Saint-Quentin-enYvelines Cedex France Tel 33 1-30-60-70-00 Fax 33 1-30-60-71-11

Atmel Japan 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan Tel 81 3-3523-3551 Fax 81 3-3523-7581

Product Contact

Web Site

Literature Requests

Technical Support

Sales Contact

Disclaimer The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN ATMEL’S TERMS AND CONDITIONS OF SALE LOCATED ON ATMEL’S WEB SITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and product descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel’s products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.
2009 Atmel Corporation. All rights reserved. Atmel logo and combinations thereof and others, are registered trademarks or trademarks of Atmel Corporation or its subsidiaries. Other terms and product names may be trademarks of others.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AT25FS010N-SH27-B Datasheet file may be downloaded here without warranties.

Datasheet ID: AT25FS010N-SH27-B 518915