AT25F1024AN-10SU-2.7

AT25F1024AN-10SU-2.7 Datasheet

AT25F1024A

Part	Datasheet
AT25F1024AN-10SU-2.7	AT25F1024AN-10SU-2.7 (pdf)

PDF Datasheet Preview
• Serial Peripheral Interface SPI Compatible • Supports SPI Modes 0,0 and 3 1,1 Datasheet Describes Mode 0 Operation • 33 MHz Clock Rate • Byte Mode and 256-byte Page Mode for Program Operations • Sector Architecture: Four Sectors with 32K Bytes Each 1M 128 Pages per Sector • Product Identification Mode • Low-voltage Operation VCC = 2.7V to 3.6V • Sector Write Protection • Write Protect WP Pin and Write Disable Instructions for both Hardware and Software Data Protection • Self-timed Program Cycle 20 µs/Byte Typical • Self-timed Sector Erase Cycle 1 second/Sector Typical • Single Cycle Reprogramming Erase and Program for Status Register • High Reliability Endurance 10,000 Write Cycles Typical Data Retention 20 Years • Lead-free/Halogen-free Devices • 8-lead JEDEC SOIC and 8-lead SAP Packages 1Mbit High Speed SPI Serial Flash Memory 1M 131,072 x 8 AT25F1024A The AT25F1024A provides 1,048,576 bits of serial reprogrammable Flash memory organized as 131,072 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT25F1024A is available in a space-saving 8-lead JEDEC SOIC and 8-lead SAP packages. The AT25F1024A is enabled through the Chip Select pin CS and accessed via a 3wire interface consisting of Serial Data Input SI , Serial Data Output SO , and Serial Clock SCK . All write cycles are completely self-timed. Block Write protection for top 1/4, top 1/2 or the entire memory array is enabled by programming the status register. Separate write enable and write disable instructions are provided for additional data protection. Hardware data protection is provided via the WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence. Table Pin Name CS SCK SI SO GND VCC WP HOLD Pin Configurations Function Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Power Supply Write Protect Suspends Serial Input 8-lead SAP VCC 8 HOLD 7 SCK 6 SI 5 1 CS 2 SO 3 WP 4 GND Bottom View 8-lead SOIC CS 1 SO 2 WP 3 GND 4 8 VCC 7 HOLD 6 SCK 5 SI Absolute Maximum Ratings* Operating to +85°C Storage Temperature to +150°C Voltage on Any Pin with Respect to Ground to +5.0V Maximum Operating Voltage 4.2V DC Output mA *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 AT25F1024A Figure Block Diagram 131,072 x 8 AT25F1024A Table Pin Capacitance 1 Applicable over recommended operating range from TA = 25°C, f = MHz, VCC = +3.6V unless otherwise noted Symbol Test Conditions Units Conditions COUT CIN Note: Output Capacitance SO Input Capacitance CS, SCK, SI, WP, HOLD This parameter is characterized and is not 100% tested. VOUT = 0V VIN = 0V Table DC Characteristics Applicable over recommended operating range from TAI = to +85°C, VCC = to +3.6V, TAC = 0 to +70°C, VCC = to +3.6V unless otherwise noted Symbol Parameter Test Condition Ordering Information Ordering Code AT25F1024AN-10SU-2.7 AT25F1024AY4-10YU-2.7 Package 8S1 8Y4 Operation Range Lead-free/Halogen-free Industrial Temperature to 85°C Package Type 8S1 8-lead, Wide, Plastic Gull Wing Small Outline Package JEDEC SOIC 8Y4 8-lead, mm x mm Body, Dual Footprint, Non-leaded, Small Array Package SAP Options Low-voltage 2.7V to 3.6V 16 AT25F1024A Package Drawing 8S1 JEDEC SOIC AT25F1024A Top View Side View End View COMMON DIMENSIONS Unit of Measure = mm SYMBOL A A1 b C D E1 E L NOTE Note These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc. 1150 E. Cheyenne Mtn. Blvd. R Colorado Springs, CO 80906 TITLE 8S1, 8-lead Wide Body , Plastic Gull Wing Small Outline JEDEC SOIC 10/7/03 8Y4 SAP PIN 1 INDEX AREA PIN 1 ID COMMON DIMENSIONS Unit of Measure = mm SYMBOL A A1 D E D1 E1 b e e1 L TYP REF NOTE 1150 E. Cheyenne Mtn. Blvd. R Colorado Springs, CO 80906 8Y4, 8-lead x mm Body SOIC Array Package SAP Y4 5/24/04 18 AT25F1024A Date 7/2007 Comments AT25F1024A Headquarters Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel 1 408 441-0311 Fax 1 408 487-2600 International Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel 852 2721-9778 Fax 852 2722-1369

PDF Datasheet Preview

• Serial Peripheral Interface SPI Compatible
• Supports SPI Modes 0,0 and 3 1,1

Datasheet Describes Mode 0 Operation
• 33 MHz Clock Rate
• Byte Mode and 256-byte Page Mode for Program Operations
• Sector Architecture:

Four Sectors with 32K Bytes Each 1M 128 Pages per Sector
• Product Identification Mode
• Low-voltage Operation VCC = 2.7V to 3.6V
• Sector Write Protection
• Write Protect WP Pin and Write Disable Instructions for both Hardware and Software Data Protection
• Self-timed Program Cycle 20 µs/Byte Typical
• Self-timed Sector Erase Cycle 1 second/Sector Typical
• Single Cycle Reprogramming Erase and Program for Status Register
• High Reliability Endurance 10,000 Write Cycles Typical Data Retention 20 Years
• Lead-free/Halogen-free Devices
• 8-lead JEDEC SOIC and 8-lead SAP Packages
1Mbit High Speed SPI Serial Flash Memory
1M 131,072 x 8

AT25F1024A

The AT25F1024A provides 1,048,576 bits of serial reprogrammable Flash memory organized as 131,072 words of 8 bits each. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The AT25F1024A is available in a space-saving 8-lead JEDEC SOIC and 8-lead SAP packages.

The AT25F1024A is enabled through the Chip Select pin CS and accessed via a 3wire interface consisting of Serial Data Input SI , Serial Data Output SO , and Serial Clock SCK . All write cycles are completely self-timed.

Block Write protection for top 1/4, top 1/2 or the entire memory array is enabled by programming the status register. Separate write enable and write disable instructions are provided for additional data protection. Hardware data protection is provided via the WP pin to protect against inadvertent write attempts to the status register. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence.

Table Pin Name CS SCK SI SO GND VCC WP HOLD

Pin Configurations Function Chip Select Serial Data Clock Serial Data Input Serial Data Output Ground Power Supply Write Protect Suspends Serial Input
8-lead SAP

VCC 8 HOLD 7

SCK 6 SI 5
1 CS 2 SO 3 WP 4 GND

Bottom View
8-lead SOIC

CS 1 SO 2 WP 3 GND 4
8 VCC 7 HOLD 6 SCK 5 SI

Absolute Maximum Ratings*

Operating to +85°C Storage Temperature to +150°C Voltage on Any Pin with Respect to Ground to +5.0V Maximum Operating Voltage 4.2V DC Output mA
*NOTICE:

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2 AT25F1024A

Figure Block Diagram
131,072 x 8

AT25F1024A

Table Pin Capacitance 1 Applicable over recommended operating range from TA = 25°C, f = MHz, VCC = +3.6V unless otherwise noted

Symbol Test Conditions

Units

Conditions

COUT

CIN Note:

Output Capacitance SO

Input Capacitance CS, SCK, SI, WP, HOLD This parameter is characterized and is not 100% tested.

VOUT = 0V

VIN = 0V

Table DC Characteristics

Applicable over recommended operating range from TAI = to +85°C, VCC = to +3.6V, TAC = 0 to +70°C, VCC = to +3.6V unless otherwise noted

Symbol Parameter

Test Condition
Ordering Information
Ordering Code

AT25F1024AN-10SU-2.7 AT25F1024AY4-10YU-2.7

Package
8S1 8Y4

Operation Range

Lead-free/Halogen-free Industrial Temperature
to 85°C

Package Type 8S1 8-lead, Wide, Plastic Gull Wing Small Outline Package JEDEC SOIC 8Y4 8-lead, mm x mm Body, Dual Footprint, Non-leaded, Small Array Package SAP

Options Low-voltage 2.7V to 3.6V
16 AT25F1024A

Package Drawing 8S1 JEDEC SOIC

AT25F1024A

Top View

Side View

End View

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL A A1 b C D E1 E L

NOTE

Note These drawings are for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc.
1150 E. Cheyenne Mtn. Blvd. R Colorado Springs, CO 80906

TITLE 8S1, 8-lead Wide Body , Plastic Gull Wing

Small Outline JEDEC SOIC
10/7/03
8Y4 SAP

PIN 1 INDEX AREA

PIN 1 ID

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL A A1 D E D1 E1 b e e1 L

TYP REF

NOTE
1150 E. Cheyenne Mtn. Blvd. R Colorado Springs, CO 80906
8Y4, 8-lead x mm Body SOIC Array Package SAP Y4
5/24/04
18 AT25F1024A

Date 7/2007

Comments

AT25F1024A

Headquarters

Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131 USA Tel 1 408 441-0311 Fax 1 408 487-2600

International

Atmel Asia Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimshatsui East Kowloon Hong Kong Tel 852 2721-9778 Fax 852 2722-1369

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AT25F1024AN-10SU-2.7 Datasheet file may be downloaded here without warranties.

Datasheet ID: AT25F1024AN-10SU-2.7 518912