AT25DQ161-SH-B

AT25DQ161-SH-B Datasheet

Atmel AT25DQ161

Part	Datasheet
AT25DQ161-SH-B	AT25DQ161-SH-B (pdf)

Related Parts	Information
AT25DQ161-MH-Y	AT25DQ161-MH-Y
AT25DQ161-SSH-B	AT25DQ161-SSH-B
AT25DQ161-SSH-T	AT25DQ161-SSH-T
AT25DQ161-SH-T	AT25DQ161-SH-T
AT25DQ161-MH-T	AT25DQ161-MH-T
AT25DQ161-MH-B	AT25DQ161-MH-B

PDF Datasheet Preview
Atmel AT25DQ161 16-Mbit, 2.7V Minimum SPI Serial Flash Memory with Dual-I/O and Quad-I/O Support DATASHEET Not Recommended for New Designs Use AT25DQ321 Single 2.7V - 3.6V supply Serial Peripheral Interface SPI compatible Supports SPI Modes 0 and 3 Supports RapidS operation Supports Dual- and Quad-Input Program Supports Dual- and Quad-Output Read Very high operating frequencies 100MHz for RapidS 85MHz for SPI Clock-to-output time tV of 5ns maximum Flexible, optimized erase architecture for code + data storage applications Uniform 4KB, 32KB, and 64KB Block Erase Full Chip Erase Individual sector protection with Global Protect/Unprotect feature 32 sectors of 64KB each Hardware controlled locking of protected sectors via WP pin Sector Lockdown Make any combination of 64KB sectors permanently read-only 128-byte One-Time Programmable OTP Security Register Flexible programming Byte/Page Program 1 to 256 bytes Fast Program and Erase times 1.0ms typical Page Program 256 bytes time 50ms typical 4KB Block Erase time 250ms typical 32KB Block Erase time 400ms typical 64KB Block Erase time Program and Erase Suspend/Resume Automatic checking and reporting of erase/program failures Software controlled reset JEDEC Standard Manufacturer and Device ID Read Methodology Low power dissipation 5mA Active Read current typical at 20MHz 5uA Deep Power-Down current typical Endurance 100,000 Program/Erase cycles Data retention 20 years Complies with full industrial temperature range Industry standard green Pb/Halide-free/RoHS-compliant package options 8-lead SOIC and wide 8-pad Ultra Thin UDFN 5 x 6 x 0.6mm The Atmel AT25DQ161 is a serial interface Flash memory device designed for use in a wide variety of high-volume consumer based applications in which program code is shadowed from Flash memory into embedded or external RAM for execution. The flexible erase architecture of the AT25DQ161, with its erase granularity as small as 4KB, makes it ideal for data storage as well, eliminating the need for additional data storage EEPROM devices. The physical sectoring and the erase block sizes of the AT25DQ161 have been optimized to meet the needs of today's code and data storage applications. By optimizing the size of the physical sectors and erase blocks, the memory space can be used much more efficiently. Because certain code modules and data storage segments must reside by themselves in their own protected sectors, the wasted and unused memory space that occurs with large sectored and large block erase Flash memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines and data storage segments to be added while still maintaining the same overall device density. The AT25DQ161 also offers a sophisticated method for protecting individual sectors against erroneous or malicious program and erase operations. By providing the ability to individually protect and unprotect sectors, a system can unprotect a specific sector to modify its contents while keeping the remaining sectors of the memory array securely protected. This is useful in applications where the program code is patched, updated on a subroutine or module basis, or in applications where data storage segments need to be modified without running the risk of errant modifications to the program code segments. In addition to individual sector protection capabilities, the AT25DQ161 incorporates Global Protect and Global Unprotect features that allow the entire memory array to be either protected or unprotected all at once. This reduces overhead during the manufacturing process since sectors do not have to be unprotected one-by-one prior to initial programming. To take code and data protection to the next level, the AT25DQ161 incorporates a sector lockdown mechanism that allows any combination of individual 64KB sectors to be locked down and become permanently read-only. This addresses the need of certain secure applications that require portions of the Flash memory array to be permanently protected against malicious attempts at altering program code, data modules, security information or encryption/decryption algorithms, keys, and routines. The device also contains a specialized OTP One-Time Programmable Security Register that can be used for purposes such as unique device serialization, system-level Electronic Serial Number ESN storage, locked key storage, etc. Specifically designed for use in 3V systems, the AT25DQ161 supports read, program, and erase operations with a supply voltage range of 2.7V to 3.6V. No separate voltage is required for programming and erasing. Atmel AT25DQ161 [DATASHEET] Pin Descriptions and Pinouts Table Pin Descriptions Symbol CS SCK SI I/O0 SO I/O1 Name and Function Chip Select Asserting the CS pin selects the device. When the CS pin is deasserted, the device will be deselected and normally be placed in standby mode not Deep Power-Down mode , and the SO pin will be in a high-impedance state. When the device is deselected, data will not be accepted on the SI pin. A high-to-low transition on the CS pin is required to start an operation, and a low-to-high transition is required to end an operation. When ending an internally self-timed operation such as a program or erase cycle, the device will not enter the standby mode until the completion of the operation. Serial Clock This pin is used to provide a clock to the device and is used to control the flow of data to and from the device. Command, address, and input data present on the SI pin or I/O pins is always latched in on the rising edge of SCK, while output data on the SO pin or I/O pins is always clocked out on the falling edge of SCK. Serial Input I/O0 The SI pin is used to shift data into the device. The SI pin is used for all data input including command and address sequences. Data on the SI pin is always latched in on the rising edge of SCK. With the Dual-Input and Quad-Input Byte/Page Program commands, the SI pin is used as an input pin I/O0 in conjunction with other pins to allow two bits on I/O1-0 or four bits on I/O3-0 of data to be clocked in on every rising edge of SCK. With the Dual-Output and Quad-Output Read Array commands, the SI pin becomes an output pin I/O0 and, along with other pins, allows two bits on I/O1-0 or four bits on I/O3-0 of data to be clocked out on every falling edge of SCK. To maintain consistency with SPI nomenclature, the SI I/O0 pin will be referenced as SI throughout the document with exception to sections dealing with the Dual-Input and Quad-Input Byte/Page Program commands as well as the Dual-Output and Quad-Output Read Array commands in which it will be referenced as I/O0. Data present on the SI pin will be ignored whenever the device is deselected CS is deasserted . Serial Output I/O1 The SO pin is used to shift data out from the device. Data on the SO pin is always clocked out on the falling edge of SCK. Ordering Information Ordering Code Detail AT 2 5 DQ1 6 1 SSH B Atmel Designator Product Family Device Density 16 = 16-megabit Interface 1 = Serial Shipping Carrier Option B = Bulk tubes Y = Bulk trays T = Tape and reel Device Grade H = Green, NiPdAu lead finish, Industrial temperature range to +85°C Package Option SS = 8-lead, wide SOIC S = 8-lead, wide SOIC M = 8-pad, 5 x 6 x 0.6mm UDFN Green Package Options Pb/Halide-free/RoHS Compliant Atmel Ordering Code Package Lead Pad Finish Operating Voltage AT25DQ161-MH-Y AT25DQ161-MH-T 8MA1 AT25DQ161-SSH-B AT25DQ161-SSH-T NiPdAu 2.7V to 3.6V AT25DQ161-SH-B 8S2 AT25DQ161-SH-T Note: The shipping carrier option code is not marked on the devices. Max. Freq. MHz Operation Range Industrial -40°C to +85°C 8MA1 8S1 8S2 Package Type 8-pad 5 x 6 x 0.6mm body , Thermally Enhanced Plastic Ultra Thin Dual Flat No Lead UDFN 8-lead, wide, Plastic Gull Wing Small Outline JEDEC SOIC 8-lead, wide, Plastic Gull Wing Small Outline EIAJ SOIC Atmel AT25DQ161 [DATASHEET] 60 Packaging Information 8MA1 UDFN Pin 1 ID D SIDE VIEW y TOP VIEW Pin #1 Notch R Option B Option A Pin #1 Chamfer C BOTTOM VIEW COMMON DIMENSIONS Unit of Measure = mm SYMBOL A A1 b C D D2 E E2 e L y K MIN NOM MAX NOTE Package Drawing Contact: TITLE 8MA1, 8-pad 5 x 6 x mm Body , Thermally Enhanced Plastic Ultra Thin Dual Flat No Lead Package UDFN 8MA1 Atmel AT25DQ161 [DATASHEET] 61 8S1 JEDEC SOIC TOP VIEW SIDE VIEW Notes This drawing is for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc.

PDF Datasheet Preview

Atmel AT25DQ161
16-Mbit, 2.7V Minimum SPI Serial Flash Memory with Dual-I/O and Quad-I/O Support

DATASHEET

Not Recommended for New Designs Use AT25DQ321

Single 2.7V - 3.6V supply

Serial Peripheral Interface SPI compatible Supports SPI Modes 0 and 3 Supports RapidS operation Supports Dual- and Quad-Input Program Supports Dual- and Quad-Output Read

Very high operating frequencies 100MHz for RapidS 85MHz for SPI Clock-to-output time tV of 5ns maximum

Flexible, optimized erase architecture for code + data storage applications Uniform 4KB, 32KB, and 64KB Block Erase Full Chip Erase

Individual sector protection with Global Protect/Unprotect feature 32 sectors of 64KB each

Hardware controlled locking of protected sectors via WP pin

Sector Lockdown Make any combination of 64KB sectors permanently read-only
128-byte One-Time Programmable OTP Security Register

Flexible programming Byte/Page Program 1 to 256 bytes

Fast Program and Erase times 1.0ms typical Page Program 256 bytes time 50ms typical 4KB Block Erase time 250ms typical 32KB Block Erase time 400ms typical 64KB Block Erase time

Program and Erase Suspend/Resume

Automatic checking and reporting of erase/program failures

Software controlled reset

JEDEC Standard Manufacturer and Device ID Read Methodology

Low power dissipation 5mA Active Read current typical at 20MHz 5uA Deep Power-Down current typical

Endurance 100,000 Program/Erase cycles

Data retention 20 years

Complies with full industrial temperature range

Industry standard green Pb/Halide-free/RoHS-compliant package options 8-lead SOIC and wide 8-pad Ultra Thin UDFN 5 x 6 x 0.6mm

The Atmel AT25DQ161 is a serial interface Flash memory device designed for use in a wide variety of high-volume consumer based applications in which program code is shadowed from Flash memory into embedded or external RAM for execution. The flexible erase architecture of the AT25DQ161, with its erase granularity as small as 4KB, makes it ideal for data storage as well, eliminating the need for additional data storage EEPROM devices.

The physical sectoring and the erase block sizes of the AT25DQ161 have been optimized to meet the needs of today's code and data storage applications. By optimizing the size of the physical sectors and erase blocks, the memory space can be used much more efficiently. Because certain code modules and data storage segments must reside by themselves in their own protected sectors, the wasted and unused memory space that occurs with large sectored and large block erase Flash memory devices can be greatly reduced. This increased memory space efficiency allows additional code routines and data storage segments to be added while still maintaining the same overall device density.

The AT25DQ161 also offers a sophisticated method for protecting individual sectors against erroneous or malicious program and erase operations. By providing the ability to individually protect and unprotect sectors, a system can unprotect a specific sector to modify its contents while keeping the remaining sectors of the memory array securely protected. This is useful in applications where the program code is patched, updated on a subroutine or module basis, or in applications where data storage segments need to be modified without running the risk of errant modifications to the program code segments. In addition to individual sector protection capabilities, the AT25DQ161 incorporates Global Protect and Global Unprotect features that allow the entire memory array to be either protected or unprotected all at once. This reduces overhead during the manufacturing process since sectors do not have to be unprotected one-by-one prior to initial programming.

To take code and data protection to the next level, the AT25DQ161 incorporates a sector lockdown mechanism that allows any combination of individual 64KB sectors to be locked down and become permanently read-only. This addresses the need of certain secure applications that require portions of the Flash memory array to be permanently protected against malicious attempts at altering program code, data modules, security information or encryption/decryption algorithms, keys, and routines. The device also contains a specialized OTP One-Time Programmable Security Register that can be used for purposes such as unique device serialization, system-level Electronic Serial Number ESN storage, locked key storage, etc.

Specifically designed for use in 3V systems, the AT25DQ161 supports read, program, and erase operations with a supply voltage range of 2.7V to 3.6V. No separate voltage is required for programming and erasing.

Atmel AT25DQ161 [DATASHEET]

Pin Descriptions and Pinouts

Table Pin Descriptions

Symbol CS SCK SI I/O0

SO I/O1

Name and Function

Chip Select Asserting the CS pin selects the device. When the CS pin is deasserted, the device will be deselected and normally be placed in standby mode not Deep Power-Down mode , and the SO pin will be in a high-impedance state. When the device is deselected, data will not be accepted on the SI pin.

A high-to-low transition on the CS pin is required to start an operation, and a low-to-high transition is required to end an operation. When ending an internally self-timed operation such as a program or erase cycle, the device will not enter the standby mode until the completion of the operation.

Serial Clock This pin is used to provide a clock to the device and is used to control the flow of data to and from the device. Command, address, and input data present on the SI pin or I/O pins is always latched in on the rising edge of SCK, while output data on the SO pin or I/O pins is always clocked out on the falling edge of SCK.

Serial Input I/O0 The SI pin is used to shift data into the device. The SI pin is used for all data input including command and address sequences. Data on the SI pin is always latched in on the rising edge of SCK.

With the Dual-Input and Quad-Input Byte/Page Program commands, the SI pin is used as an input pin I/O0 in conjunction with other pins to allow two bits on I/O1-0 or four bits on I/O3-0 of data to be clocked in on every rising edge of SCK. With the Dual-Output and Quad-Output Read Array commands, the SI pin becomes an output pin I/O0 and, along with other pins, allows two bits on I/O1-0 or four bits on I/O3-0 of data to be clocked out on every falling edge of SCK. To maintain consistency with SPI nomenclature, the SI I/O0 pin will be referenced as SI throughout the document with exception to sections dealing with the Dual-Input and Quad-Input Byte/Page Program commands as well as the Dual-Output and Quad-Output Read Array commands in which it will be referenced as I/O0.

Data present on the SI pin will be ignored whenever the device is deselected CS is deasserted .

Serial Output I/O1 The SO pin is used to shift data out from the device. Data on the SO pin is always clocked out on the falling edge of SCK.
Ordering Information
Ordering Code Detail AT 2 5 DQ1 6 1 SSH B

Atmel Designator

Product Family

Device Density
16 = 16-megabit

Interface
1 = Serial

Shipping Carrier Option

B = Bulk tubes Y = Bulk trays T = Tape and reel

Device Grade

H = Green, NiPdAu lead finish, Industrial temperature range to +85°C

Package Option

SS = 8-lead, wide SOIC S = 8-lead, wide SOIC M = 8-pad, 5 x 6 x 0.6mm UDFN

Green Package Options Pb/Halide-free/RoHS Compliant
Atmel Ordering Code

Package

Lead Pad Finish

Operating Voltage

AT25DQ161-MH-Y AT25DQ161-MH-T
8MA1

AT25DQ161-SSH-B AT25DQ161-SSH-T

NiPdAu
2.7V to 3.6V

AT25DQ161-SH-B 8S2

AT25DQ161-SH-T

Note:

The shipping carrier option code is not marked on the devices.

Max. Freq. MHz

Operation Range

Industrial -40°C to +85°C
8MA1 8S1 8S2

Package Type 8-pad 5 x 6 x 0.6mm body , Thermally Enhanced Plastic Ultra Thin Dual Flat No Lead UDFN 8-lead, wide, Plastic Gull Wing Small Outline JEDEC SOIC 8-lead, wide, Plastic Gull Wing Small Outline EIAJ SOIC

Atmel AT25DQ161 [DATASHEET] 60

Packaging Information
8MA1 UDFN

Pin 1 ID D

SIDE VIEW y

TOP VIEW

Pin #1 Notch R

Option B

Option A

Pin #1 Chamfer C

BOTTOM VIEW

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL A A1 b C D D2 E E2 e L y K

MIN NOM MAX

NOTE

Package Drawing Contact:

TITLE 8MA1, 8-pad 5 x 6 x mm Body , Thermally Enhanced Plastic Ultra Thin Dual Flat No Lead Package UDFN
8MA1

Atmel AT25DQ161 [DATASHEET] 61
8S1 JEDEC SOIC

TOP VIEW

SIDE VIEW

Notes This drawing is for general information only. Refer to JEDEC Drawing MS-012, Variation AA for proper dimensions, tolerances, datums, etc.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AT25DQ161-SH-B Datasheet file may be downloaded here without warranties.

Datasheet ID: AT25DQ161-SH-B 518910