AT24C512W-10SI-2.7

AT24C512W-10SI-2.7 Datasheet

The AT24C512 provides 524,288 bits of serial electrically erasable and programmable read only memory EEPROM organized as 65,536 words of 8 bits each. The device’s cascadable feature allows up to 4 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-pin PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead Leadless Array LAP and 8-ball dBGA packages. In addition, the entire family is available in 2.7V 2.7V to 5.5V and 1.8V 1.8V to 3.6V versions.

Part	Datasheet
AT24C512W-10SI-2.7	AT24C512W-10SI-2.7 (pdf)

Related Parts	Information
AT24C512N-10SI-1.8	AT24C512N-10SI-1.8
AT24C512N-10SI-2.7	AT24C512N-10SI-2.7

PDF Datasheet Preview
• Low-voltage and Standard-voltage Operation VCC = 2.7V to 5.5V VCC = 1.8V to 3.6V • Internally Organized 65,536 x 8 • 2-wire Serial Interface • Schmitt Triggers, Filtered Inputs for Noise Suppression • Bidirectional Data Transfer Protocol • 1 MHz 5V , 400 kHz 2.7V and 100 kHz 1.8V Compatibility • Write Protect Pin for Hardware and Software Data Protection • 128-byte Page Write Mode Partial Page Writes Allowed • Self-timed Write Cycle 5 ms Max • High Reliability Endurance 100,000 Write Cycles Data Retention 40 Years • Automotive Grade, Extended Temperature and Lead-free/Halogen-free Devices Available • 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead LAP and 8-ball dBGATM Packages The AT24C512 provides 524,288 bits of serial electrically erasable and programmable read only memory EEPROM organized as 65,536 words of 8 bits each. The device’s cascadable feature allows up to 4 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-pin PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead Leadless Array LAP and 8-ball dBGA packages. In addition, the entire family is available in 2.7V 2.7V to 5.5V and 1.8V 1.8V to 3.6V versions. Pin Configurations 8-lead PDIP Pin Name A0 - A1 SDA SCL WP NC Function Address Inputs Serial Data Serial Clock Input Write Protect No Connect 8-lead TSSOP A0 1 A1 2 NC 3 GND 4 8 VCC 7 WP 6 SCL 5 SDA A0 1 A1 2 NC 3 GND 4 8 VCC 7 WP 6 SCL 5 SDA 8-lead Leadless Array VCC 8 WP 7 SCL 6 SDA 5 1 A0 2 A1 3 NC 4 GND Bottom View 8-ball dBGA 8-lead SOIC A0 1 A1 2 NC 3 GND 4 8 VCC 7 WP 6 SCL 5 SDA VCC 8 WP 7 SCL 6 SDA 5 1 A0 2 A1 3 NC 4 GND Bottom View 2-wire Serial EEPROM 512K 65,536 x 8 AT24C512 Absolute Maximum Ratings* Operating -55° C to +125° C Storage Temperature -65° C to +150° C Voltage on Any Pin with Respect to Ground to +7.0V Maximum Operating Voltage 6.25V DC Output mA Block Diagram *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2 AT24C512 AT24C512 Pin Description SERIAL CLOCK SCL The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device. SERIAL DATA SDA The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open collector devices. DEVICE/ADDRESSES A1, A0 The A1 and A0 pins are device address inputs that are hardwired or left not connected for hardware compatibility with other AT24Cxx devices. When the pins are hardwired, as many as four 512K devices may be addressed on a single bus system device addressing is discussed in detail under the Device Addressing section . If the pins are left floating, the A1 and A0 pins will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting the address pins to GND. Ordering Information Ordering Code Package Operation Range AT24C512C1-10CI-2.7 AT24C512-10PI-2.7 AT24C512W-10SI-2.7 AT24C512N-10SI-2.7 AT24C512-10TI-2.7 AT24C512-10UI-2.7 8CN1 8P3 8S2 8S1 8A2 8U2 Industrial Temperature -40° C to 85° C AT24C512C1-10CI-1.8 AT24C512-10PI-1.8 AT24C512W-10SI-1.8 AT24C512N-10SI-1.8 AT24C512-10TI-1.8 AT24C512-10UI-1.8 AT24C512N-10SU-2.7 AT24C512N-10SU-1.8 AT24C512-10TU-2.7 AT24C512-10TU-1.8 8CN1 8P3 8S2 8S1 8A2 8U2 8S1 8A2 Industrial Temperature -40° C to 85° C Lead-free/Halogen-free/ Industrial Temperature -40° C to 85° C Note For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables. 8CN1 8P3 8S2 8S1 8A2 8U2 Package Type 8-lead, Wide, Leadless Array Package LAP 8-lead, Wide, Plastic Dual In-line Package PDIP 8-lead, Wide, Plastic Gull Wing Small Outline Package EIAJ SOIC 8-lead, Wide, Plastic Gull Wing Small Outline Package JEDEC SOIC 8-lead, mm Body, Plastic Thin Shrink Small Outline Package TSSOP 8-ball, die Ball Grid Array Package dBGA Options Low-voltage 2.7V to 5.5V Low-voltage 1.8V to 3.6V Packaging Information 8CN1 LAP Marked Pin1 Indentifier mm TYP Top View Bottom View Note Metal Pad Dimensions. Side View Pin1 Corner COMMON DIMENSIONS Unit of Measure = mm SYMBOL MIN NOM MAX NOTE 2325 Orchard Parkway R San Jose, CA 95131 8CN1, 8-lead 8 x 5 x mm Body , Lead Pitch mm, Leadless Array Package LAP 11/13/01 8CN1 14 AT24C512 8P3 PDIP AT24C512 Top View End View 4 PLCS Side View COMMON DIMENSIONS Unit of Measure = inches SYMBOL A A2 b b2 b3 c D D1 E E1 e eA L

PDF Datasheet Preview

• Low-voltage and Standard-voltage Operation

VCC = 2.7V to 5.5V VCC = 1.8V to 3.6V
• Internally Organized 65,536 x 8
• 2-wire Serial Interface
• Schmitt Triggers, Filtered Inputs for Noise Suppression
• Bidirectional Data Transfer Protocol
• 1 MHz 5V , 400 kHz 2.7V and 100 kHz 1.8V Compatibility
• Write Protect Pin for Hardware and Software Data Protection
• 128-byte Page Write Mode Partial Page Writes Allowed
• Self-timed Write Cycle 5 ms Max
• High Reliability

Endurance 100,000 Write Cycles

Data Retention 40 Years
• Automotive Grade, Extended Temperature and Lead-free/Halogen-free

Devices Available
• 8-lead PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-lead TSSOP,
8-lead LAP and 8-ball dBGATM Packages

The AT24C512 provides 524,288 bits of serial electrically erasable and programmable read only memory EEPROM organized as 65,536 words of 8 bits each. The device’s cascadable feature allows up to 4 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential. The devices are available in space-saving 8-pin PDIP, 8-lead EIAJ SOIC, 8-lead JEDEC SOIC, 8-lead TSSOP, 8-lead Leadless Array LAP and 8-ball dBGA packages. In addition, the entire family is available in 2.7V 2.7V to 5.5V and 1.8V 1.8V to 3.6V versions.

Pin Configurations
8-lead PDIP

Pin Name A0 - A1 SDA SCL WP NC

Function Address Inputs Serial Data Serial Clock Input Write Protect No Connect
8-lead TSSOP

A0 1 A1 2 NC 3 GND 4
8 VCC 7 WP 6 SCL 5 SDA

A0 1 A1 2 NC 3 GND 4
8 VCC 7 WP 6 SCL 5 SDA
8-lead Leadless Array

VCC 8 WP 7 SCL 6 SDA 5
1 A0 2 A1 3 NC 4 GND

Bottom View
8-ball dBGA
8-lead SOIC

A0 1 A1 2 NC 3 GND 4
8 VCC 7 WP 6 SCL 5 SDA

VCC 8 WP 7 SCL 6 SDA 5
1 A0 2 A1 3 NC 4 GND

Bottom View
2-wire Serial EEPROM
512K 65,536 x 8

AT24C512

Absolute Maximum Ratings*

Operating -55° C to +125° C Storage Temperature -65° C to +150° C Voltage on Any Pin with Respect to Ground to +7.0V Maximum Operating Voltage 6.25V DC Output mA

Block Diagram
*NOTICE:

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
2 AT24C512

AT24C512

Pin Description

SERIAL CLOCK SCL The SCL input is used to positive edge clock data into each EEPROM device and negative edge clock data out of each device.

SERIAL DATA SDA The SDA pin is bidirectional for serial data transfer. This pin is open-drain driven and may be wire-ORed with any number of other open-drain or open collector devices.

DEVICE/ADDRESSES A1, A0 The A1 and A0 pins are device address inputs that are hardwired or left not connected for hardware compatibility with other AT24Cxx devices. When the pins are hardwired, as many as four 512K devices may be addressed on a single bus system device addressing is discussed in detail under the Device Addressing section . If the pins are left floating, the A1 and A0 pins will be internally pulled down to GND if the capacitive coupling to the circuit board VCC plane is <3 pF. If coupling is >3 pF, Atmel recommends connecting the address pins to GND.
Ordering Information
Ordering Code

Package

Operation Range

AT24C512C1-10CI-2.7 AT24C512-10PI-2.7 AT24C512W-10SI-2.7 AT24C512N-10SI-2.7 AT24C512-10TI-2.7 AT24C512-10UI-2.7
8CN1 8P3 8S2 8S1 8A2 8U2

Industrial Temperature -40° C to 85° C

AT24C512C1-10CI-1.8 AT24C512-10PI-1.8 AT24C512W-10SI-1.8 AT24C512N-10SI-1.8 AT24C512-10TI-1.8 AT24C512-10UI-1.8

AT24C512N-10SU-2.7 AT24C512N-10SU-1.8 AT24C512-10TU-2.7 AT24C512-10TU-1.8
8CN1 8P3 8S2 8S1 8A2 8U2
8S1 8A2

Industrial Temperature -40° C to 85° C

Lead-free/Halogen-free/ Industrial Temperature
-40° C to 85° C

Note For 2.7V devices used in the 4.5V to 5.5V range, please refer to performance values in the AC and DC characteristics tables.
8CN1 8P3 8S2 8S1 8A2 8U2

Package Type 8-lead, Wide, Leadless Array Package LAP 8-lead, Wide, Plastic Dual In-line Package PDIP 8-lead, Wide, Plastic Gull Wing Small Outline Package EIAJ SOIC 8-lead, Wide, Plastic Gull Wing Small Outline Package JEDEC SOIC 8-lead, mm Body, Plastic Thin Shrink Small Outline Package TSSOP 8-ball, die Ball Grid Array Package dBGA

Options Low-voltage 2.7V to 5.5V Low-voltage 1.8V to 3.6V

Packaging Information
8CN1 LAP

Marked Pin1 Indentifier
mm TYP

Top View

Bottom View

Note Metal Pad Dimensions.

Side View

Pin1 Corner

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL MIN NOM MAX NOTE
2325 Orchard Parkway R San Jose, CA 95131
8CN1, 8-lead 8 x 5 x mm Body , Lead Pitch mm, Leadless Array Package LAP
11/13/01
8CN1
14 AT24C512
8P3 PDIP

AT24C512

Top View

End View
4 PLCS

Side View

COMMON DIMENSIONS Unit of Measure = inches

SYMBOL A A2 b b2 b3 c D D1 E E1 e eA L

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Datasheet ID: AT24C512W-10SI-2.7 518888