AT17LV256-10CC

AT17LV256-10CC Datasheet

The AT17LV series FPGA Configuration EEPROMs Configurators provide an easyto-use, cost-effective configuration memory for Field Programmable Gate Arrays. The AT17LV series device is packaged in the 8-lead LAP, 8-lead PDIP, 8-lead SOIC, 20lead PLCC, 20-lead SOIC, 44-lead PLCC and 44-lead TQFP, see Table The AT17LV series Configurators uses a simple serial-access procedure to configure one or more FPGA devices. The user can select the polarity of the reset function by programming four EEPROM bytes. These devices also support a write-protection mechanism within its programming mode.

Part	Datasheet
AT17LV256-10CC	AT17LV256-10CC (pdf)

Related Parts	Information
AT17LV65-10CI	AT17LV65-10CI
AT17LV65-10CC	AT17LV65-10CC
AT17LV040-10TQI	AT17LV040-10TQI
AT17LV040-10TQC	AT17LV040-10TQC
AT17LV256-10CI	AT17LV256-10CI
AT17LV512-10CI	AT17LV512-10CI
AT17LV040-10BJC	AT17LV040-10BJC
AT17LV512-10CC	AT17LV512-10CC
AT17LV128-10CI	AT17LV128-10CI
AT17LV040-10BJI	AT17LV040-10BJI
AT17LV002-10SI	AT17LV002-10SI
AT17LV002-10SC	AT17LV002-10SC

PDF Datasheet Preview
• EE Programmable 65,536 x 1-, 131,072 x 1-, 262,144 x 1-, 524,288 x 1-, 1,048,576 x 1-, 2,097,152 x 1-, and 4,194,304 x 1-bit Serial Memories Designed to Store Configuration Programs for Field Programmable Gate Arrays FPGAs • Supports both 3.3V and 5.0V Operating Voltage Applications • In-System Programmable ISP via Two-Wire Bus • Simple Interface to SRAM FPGAs • Compatible with Atmel AT6000, AT40K and AT94K Devices, APEX Devices, XC3000, XC4000, XC5200, Virtex FPGAs • Cascadable Read-back to Support Additional Configurations or Higher-density Arrays • Very Low-power CMOS EEPROM Process • Programmable Reset Polarity • Available in 6 mm x 6 mm x 1 mm 8-lead LAP Pin-compatible with 8-lead SOIC/VOIC Packages , 8-lead PDIP, 8-lead SOIC, 20-lead PLCC, 20-lead SOIC, 44-lead PLCC and 44-lead TQFP Packages • Emulation of Atmel’s AT24CXXX Serial EEPROMs • Low-power Standby Mode • High-reliability Endurance 100,000 Write Cycles Data Retention 90 Years for Industrial Parts at 85°C and 190 Years for Commercial Parts at 70°C • Green Pb/Halide-free/RoHS Compliant Package Options Available The AT17LV series FPGA Configuration EEPROMs Configurators provide an easyto-use, cost-effective configuration memory for Field Programmable Gate Arrays. The AT17LV series device is packaged in the 8-lead LAP, 8-lead PDIP, 8-lead SOIC, 20lead PLCC, 20-lead SOIC, 44-lead PLCC and 44-lead TQFP, see Table The AT17LV series Configurators uses a simple serial-access procedure to configure one or more FPGA devices. The user can select the polarity of the reset function by programming four EEPROM bytes. These devices also support a write-protection mechanism within its programming mode. The AT17LV series configurators can be programmed with industry-standard programmers, Atmel’s ATDH2200E Programming Kit or Atmel’s ATDH2225 ISP Cable. FPGA Configuration EEPROM Memory AT17LV65 AT17LV128 AT17LV256 AT17LV512 AT17LV010 AT17LV002 AT17LV040 3.3V and 5V System Support Table AT17LV Series Packages Package 8-lead LAP AT17LV65/ AT17LV128/ AT17LV256 AT17LV512/ AT17LV010 AT17LV002 Yes AT17LV040 8-lead PDIP 8-lead SOIC Use 8-lead LAP 1 Use 8-lead LAP 1 20-lead PLCC 20-lead SOIC Yes 2 Yes 2 Yes 2 44-lead PLCC 44-lead TQFP The 8-lead LAP package has the same footprint as the 8-lead SOIC. Since an 8-lead SOIC package is not available for the AT17LV512/010/002 devices, it is possible to use an 8-lead LAP package instead. The pinout for the AT17LV65/128/256 devices is not pin-for-pin compatible with the AT17LV512/010/002 devices. Refer to the AT17Fxxx datasheet, available on the Atmel web site. Pin Configuration Figure 8-lead LAP DATA 1 CLK 2 WP 1 RESET/OE 3 CE 4 8 VCC 7 SER_EN 6 CEO A2 5 GND Figure 8-lead SOIC DATA 1 CLK 2 WP 1 RESET/OE 3 CE 4 8 VCC 7 SER_EN 6 CEO A2 5 GND Figure 8-lead PDIP Figure Ordering Code AT17LV65/128/256/512/010/002/040 AT17LV65A-10PC Vo ltage 3.0V to 5.5V Size Bits 65 = 65K 128 = 128K 256 = 256K 512 = 512K 010 = 1M 002 = 2M 040 = 4M Special Pinouts A = Altera Blank = Xilinx /Atmel/ Other Package Temperature C = 8CN4 C = Commercial P = 8P3 I = Industrial N = 8S1 U = Fully Green J = 20J S = 20S2 TQ = 44A BJ = 44J 8CN4 8P3 8S1 20J 20S2 44A 44J Package Type 8-lead, 6 mm x 6 mm x 1 mm, Leadless Array Package LAP Pin-compatible with 8-lead SOIC/VOID Packages 8-lead, Wide, Plastic Dual Inline Package PDIP 8-lead, Wide, Plastic Gull Wing Small Outline JEDEC SOIC 20-lead, Plastic J-leaded Chip Carrier PLCC 20-lead, Wide, Plastic Gull Wing Small Outline JEDEC SOIC 44-lead, Thin mm Plastic Quad Flat Package Carrier TQFP 44-lead, Plastic J-leaded Chip Carrier PLCC Ordering Information Standard Package Options Memory Size Ordering Code AT17LV65-10CC AT17LV65-10PC AT17LV65-10NC AT17LV65-10JC 64-Kbit 1 AT17LV65-10SC AT17LV65-10CI AT17LV65-10PI AT17LV65-10NI AT17LV65-10JI AT17LV65-10SI AT17LV128-10CC AT17LV128-10PC AT17LV128-10NC AT17LV128-10JC 128-Kbit 1 AT17LV128-10SC AT17LV128-10CI AT17LV128-10PI AT17LV128-10NI AT17LV128-10JI AT17LV128-10SI AT17LV256-10CC AT17LV256-10PC AT17LV256-10NC AT17LV256-10JC 256-Kbit 1 AT17LV256-10SC AT17LV256-10CI AT17LV256-10PI AT17LV256-10NI AT17LV256-10JI AT17LV256-10SI AT17LV512-10CC AT17LV512-10PC AT17LV512-10JC 512-Kbit 1 AT17LV512-10SC AT17LV512-10CI AT17LV512-10PI AT17LV512-10JI AT17LV512-10SI Package 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 20J 20S2 8CN4 8P3 20J 20S2 18 AT17LV65/128/256/512/010/002/040 Ordering Code Package Operation Range AT17LV010-10CC 8CN4 AT17LV010-10PC AT17LV010-10JC Commercial 0°C to 70°C 1-Mbit 1 AT17LV010-10SC AT17LV010-10CI 20S2 8CN4 AT17LV010-10PI AT17LV010-10JI Industrial -40°C to 85°C AT17LV010-10SI 20S2 AT17LV002-10CC 8CN4 AT17LV002-10JC AT17LV002-10SC AT17LV002-10TQC 20J 20S2 44A Commercial 0°C to 70°C 2-Mbit 1 AT17LV002-10BJC AT17LV002-10CI 44J 8CN4 AT17LV002-10JI AT17LV002-10SI AT17LV002-10TQI 20J 20S2 44A Industrial -40°C to 85°C AT17LV002-10BJI 4-Mbit 1 AT17LV040-10TQC AT17LV040-10BJC AT17LV040-10TQI AT17LV040-10BJI Commercial 0°C to 70°C Industrial -40°C to 85°C For operating 5V operating voltage, please refer to the corresponding AC and DC Characteristics. The last-time buy is April 11, 2006 for shaded parts. For the -10CC and -10CI packages, customers may migrate to AT17LVXXX-10CU. Green Package Options Pb/Halide-free/RoHS Compliant Memory Size 256-Kbit 1 512-Kbit 1-Mbit 1 2-Mbit 1 4-Mbit 1 Ordering Code AT17LV256-10CU AT17LV256-10JU AT17LV256-10NU AT17LV256-10PU AT17LV256-10SU AT17LV512-10CU AT17LV512-10JU AT17LV010-10CU AT17LV010-10JU AT17LV010-10PU AT17LV002-10CU AT17LV002-10JU AT17LV002-10SU AT17LV002-10TQU AT17LV040-10TQU Package 8CN4 20J 8S1 8P3 20S2 8CN4 20J 8CN4 20J 8P3 8CN4 20J 20S2 44A Operation Range Industrial -40°C to 85°C Industrial -40°C to 85°C Industrial -40°C to 85°C Industrial -40°C to 85°C Industrial -40°C to 85°C Note For operating 5V operating voltage, please refer to the corresponding AC and DC Characteristics. 20 AT17LV65/128/256/512/010/002/040 Packaging Information 8CN4 LAP AT17LV65/128/256/512/010/002/040 Marked Pin1 Indentifier mm TYP Top View Bottom View Note Metal Pad Dimensions. Side View Pin1 Corner COMMON DIMENSIONS Unit of Measure = mm SYMBOL MIN NOM MAX NOTE 2325 Orchard Parkway R San Jose, CA 95131 8CN4, 8-lead 6 x 6 x mm Body , Lead Pitch mm, Leadless Array Package LAP 11/14/01 8CN4 8P3 PDIP Top View End View 4 PLCS Side View COMMON DIMENSIONS Unit of Measure = inches SYMBOL A A2 b b2 b3 c D D1 E E1 e eA L MIN NOM MAX NOTE 2 This drawing is for general information only refer to JEDEC Drawing MS-001, Variation BA for additional information. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed inch. E and eA measured with the leads constrained to be perpendicular to datum. Pointed or rounded lead tips are preferred to ease insertion. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed mm . 01/09/02 2325 Orchard Parkway R San Jose, CA 95131 TITLE 8P3, 8-lead, Wide Body, Plastic Dual In-line Package PDIP 22 AT17LV65/128/256/512/010/002/040

PDF Datasheet Preview

• EE Programmable 65,536 x 1-, 131,072 x 1-, 262,144 x 1-, 524,288 x 1-, 1,048,576 x 1-, 2,097,152 x 1-, and 4,194,304 x 1-bit Serial Memories Designed to Store Configuration Programs for Field Programmable Gate Arrays FPGAs
• Supports both 3.3V and 5.0V Operating Voltage Applications
• In-System Programmable ISP via Two-Wire Bus
• Simple Interface to SRAM FPGAs
• Compatible with Atmel AT6000, AT40K and AT94K Devices, APEX

Devices, XC3000, XC4000, XC5200, Virtex FPGAs
• Cascadable Read-back to Support Additional Configurations or Higher-density Arrays
• Very Low-power CMOS EEPROM Process
• Programmable Reset Polarity
• Available in 6 mm x 6 mm x 1 mm 8-lead LAP Pin-compatible with 8-lead SOIC/VOIC

Packages , 8-lead PDIP, 8-lead SOIC, 20-lead PLCC, 20-lead SOIC, 44-lead PLCC and 44-lead TQFP Packages
• Emulation of Atmel’s AT24CXXX Serial EEPROMs
• Low-power Standby Mode
• High-reliability

Endurance 100,000 Write Cycles Data Retention 90 Years for Industrial Parts at 85°C and 190 Years for

Commercial Parts at 70°C
• Green Pb/Halide-free/RoHS Compliant Package Options Available

The AT17LV series FPGA Configuration EEPROMs Configurators provide an easyto-use, cost-effective configuration memory for Field Programmable Gate Arrays. The AT17LV series device is packaged in the 8-lead LAP, 8-lead PDIP, 8-lead SOIC, 20lead PLCC, 20-lead SOIC, 44-lead PLCC and 44-lead TQFP, see Table The AT17LV series Configurators uses a simple serial-access procedure to configure one or more FPGA devices. The user can select the polarity of the reset function by programming four EEPROM bytes. These devices also support a write-protection mechanism within its programming mode.

The AT17LV series configurators can be programmed with industry-standard programmers, Atmel’s ATDH2200E Programming Kit or Atmel’s ATDH2225 ISP Cable.

FPGA Configuration EEPROM Memory

AT17LV65 AT17LV128 AT17LV256 AT17LV512 AT17LV010 AT17LV002 AT17LV040
3.3V and 5V System Support

Table AT17LV Series Packages

Package 8-lead LAP

AT17LV65/ AT17LV128/ AT17LV256

AT17LV512/ AT17LV010

AT17LV002 Yes

AT17LV040
8-lead PDIP
8-lead SOIC

Use 8-lead LAP 1

Use 8-lead LAP 1
20-lead PLCC
20-lead SOIC

Yes 2

Yes 2

Yes 2
44-lead PLCC
44-lead TQFP

The 8-lead LAP package has the same footprint as the 8-lead SOIC. Since an 8-lead SOIC package is not available for the AT17LV512/010/002 devices, it is possible to use an 8-lead LAP package instead.

The pinout for the AT17LV65/128/256 devices is not pin-for-pin compatible with the AT17LV512/010/002 devices.

Refer to the AT17Fxxx datasheet, available on the Atmel web site.

Pin Configuration

Figure 8-lead LAP

DATA 1 CLK 2

WP 1 RESET/OE 3 CE 4
8 VCC 7 SER_EN 6 CEO A2 5 GND

Figure 8-lead SOIC

DATA 1 CLK 2

WP 1 RESET/OE 3 CE 4
8 VCC 7 SER_EN 6 CEO A2 5 GND

Figure 8-lead PDIP
Figure Ordering Code

AT17LV65/128/256/512/010/002/040

AT17LV65A-10PC

Vo ltage 3.0V to 5.5V

Size Bits 65 = 65K 128 = 128K 256 = 256K 512 = 512K 010 = 1M 002 = 2M 040 = 4M

Special Pinouts

A = Altera

Blank = Xilinx /Atmel/ Other

Package Temperature C = 8CN4 C = Commercial P = 8P3 I = Industrial N = 8S1 U = Fully Green J = 20J S = 20S2 TQ = 44A BJ = 44J
8CN4 8P3 8S1 20J 20S2 44A 44J

Package Type 8-lead, 6 mm x 6 mm x 1 mm, Leadless Array Package LAP Pin-compatible with 8-lead SOIC/VOID Packages 8-lead, Wide, Plastic Dual Inline Package PDIP 8-lead, Wide, Plastic Gull Wing Small Outline JEDEC SOIC 20-lead, Plastic J-leaded Chip Carrier PLCC 20-lead, Wide, Plastic Gull Wing Small Outline JEDEC SOIC 44-lead, Thin mm Plastic Quad Flat Package Carrier TQFP 44-lead, Plastic J-leaded Chip Carrier PLCC
Ordering Information

Standard Package Options

Memory Size
Ordering Code

AT17LV65-10CC

AT17LV65-10PC

AT17LV65-10NC

AT17LV65-10JC
64-Kbit 1

AT17LV65-10SC AT17LV65-10CI

AT17LV65-10PI

AT17LV65-10NI

AT17LV65-10JI

AT17LV65-10SI

AT17LV128-10CC

AT17LV128-10PC

AT17LV128-10NC

AT17LV128-10JC
128-Kbit 1

AT17LV128-10SC AT17LV128-10CI

AT17LV128-10PI

AT17LV128-10NI

AT17LV128-10JI

AT17LV128-10SI

AT17LV256-10CC

AT17LV256-10PC

AT17LV256-10NC

AT17LV256-10JC
256-Kbit 1

AT17LV256-10SC AT17LV256-10CI

AT17LV256-10PI

AT17LV256-10NI

AT17LV256-10JI

AT17LV256-10SI

AT17LV512-10CC

AT17LV512-10PC

AT17LV512-10JC
512-Kbit 1

AT17LV512-10SC AT17LV512-10CI

AT17LV512-10PI

AT17LV512-10JI

AT17LV512-10SI

Package 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 8S1 20J 20S2 8CN4 8P3 20J 20S2 8CN4 8P3 20J 20S2
18 AT17LV65/128/256/512/010/002/040
Ordering Code

Package

Operation Range

AT17LV010-10CC
8CN4

AT17LV010-10PC AT17LV010-10JC

Commercial
0°C to 70°C
1-Mbit 1

AT17LV010-10SC AT17LV010-10CI
20S2 8CN4

AT17LV010-10PI AT17LV010-10JI

Industrial
-40°C to 85°C

AT17LV010-10SI
20S2

AT17LV002-10CC
8CN4

AT17LV002-10JC AT17LV002-10SC AT17LV002-10TQC
20J 20S2 44A

Commercial
0°C to 70°C
2-Mbit 1

AT17LV002-10BJC AT17LV002-10CI
44J 8CN4

AT17LV002-10JI AT17LV002-10SI AT17LV002-10TQI
20J 20S2 44A

Industrial
-40°C to 85°C

AT17LV002-10BJI
4-Mbit 1

AT17LV040-10TQC AT17LV040-10BJC

AT17LV040-10TQI AT17LV040-10BJI

Commercial
0°C to 70°C

Industrial
-40°C to 85°C

For operating 5V operating voltage, please refer to the corresponding AC and DC Characteristics. The last-time buy is April 11, 2006 for shaded parts. For the -10CC and -10CI packages, customers may migrate to AT17LVXXX-10CU.

Green Package Options Pb/Halide-free/RoHS Compliant

Memory Size 256-Kbit 1 512-Kbit 1-Mbit 1 2-Mbit 1 4-Mbit 1
Ordering Code AT17LV256-10CU AT17LV256-10JU AT17LV256-10NU AT17LV256-10PU AT17LV256-10SU AT17LV512-10CU AT17LV512-10JU AT17LV010-10CU AT17LV010-10JU AT17LV010-10PU AT17LV002-10CU AT17LV002-10JU AT17LV002-10SU AT17LV002-10TQU

AT17LV040-10TQU

Package 8CN4 20J 8S1 8P3 20S2 8CN4 20J 8CN4 20J 8P3 8CN4 20J 20S2 44A

Operation Range

Industrial -40°C to 85°C

Industrial -40°C to 85°C

Industrial -40°C to 85°C

Industrial -40°C to 85°C

Industrial -40°C to 85°C

Note For operating 5V operating voltage, please refer to the corresponding AC and DC Characteristics.
20 AT17LV65/128/256/512/010/002/040

Packaging Information
8CN4 LAP

AT17LV65/128/256/512/010/002/040

Marked Pin1 Indentifier
mm TYP

Top View

Bottom View

Note Metal Pad Dimensions.

Side View

Pin1 Corner

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL MIN NOM MAX NOTE
2325 Orchard Parkway R San Jose, CA 95131
8CN4, 8-lead 6 x 6 x mm Body , Lead Pitch mm, Leadless Array Package LAP
11/14/01
8CN4
8P3 PDIP

Top View

End View
4 PLCS

Side View

COMMON DIMENSIONS Unit of Measure = inches

SYMBOL A A2 b b2 b3 c D D1 E E1 e eA L

MIN NOM MAX

NOTE 2

This drawing is for general information only refer to JEDEC Drawing MS-001, Variation BA for additional information. Dimensions A and L are measured with the package seated in JEDEC seating plane Gauge GS-3. D, D1 and E1 dimensions do not include mold Flash or protrusions. Mold Flash or protrusions shall not exceed inch. E and eA measured with the leads constrained to be perpendicular to datum. Pointed or rounded lead tips are preferred to ease insertion. b2 and b3 maximum dimensions do not include Dambar protrusions. Dambar protrusions shall not exceed mm .
01/09/02
2325 Orchard Parkway R San Jose, CA 95131

TITLE 8P3, 8-lead, Wide Body, Plastic Dual In-line Package PDIP
22 AT17LV65/128/256/512/010/002/040

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Datasheet ID: AT17LV256-10CC 518864