AT49F512-90JC

AT49F512-90JC Datasheet

The AT49F512 is a 5-volt-only in-system programmable and erasable Flash Memory. Its 512K of memory is organized as 65,536 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the devices offer access times to 50 ns with a power dissipation of just 165 mW over the commercial temperature range. When the device is deselected, the CMOS standby current is less than 100 µA.

Part	Datasheet
AT49F512-90JC	AT49F512-90JC (pdf)

Related Parts	Information
AT49F512-90PC	AT49F512-90PC
AT49F512-90JI	AT49F512-90JI
AT49F512-90PI	AT49F512-90PI
AT49F512-90TC	AT49F512-90TC
AT49F512-90TI	AT49F512-90TI
AT49F512-70PC	AT49F512-70PC
AT49F512-70TI	AT49F512-70TI
AT49F512-70PI	AT49F512-70PI
AT49F512-70JI	AT49F512-70JI
AT49F512-70JC	AT49F512-70JC
AT49F512-70TC	AT49F512-70TC
AT49F512-70VI	AT49F512-70VI
AT49F512-70VC	AT49F512-70VC
AT49F512-90VC	AT49F512-90VC
AT49F512-90VI	AT49F512-90VI

PDF Datasheet Preview
• Single Voltage Operation 5V Read 5V Reprogramming • Fast Read Access Time - 50 ns • Internal Program Control and Timer • 8K Bytes Boot Block With Lockout • Fast Erase Cycle Time - 10 seconds • Byte-by-Byte Programming - 10 µs/Byte • Hardware Data Protection • DATA Polling For End Of Program Detection • Low Power Dissipation 30 mA Active Current 100 µA CMOS Standby Current • Typical 10,000 Write Cycles The AT49F512 is a 5-volt-only in-system programmable and erasable Flash Memory. Its 512K of memory is organized as 65,536 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the devices offer access times to 50 ns with a power dissipation of just 165 mW over the commercial temperature range. When the device is deselected, the CMOS standby current is less than 100 µA. To allow for simple in-system reprogrammability, the AT49F512 does not require high input voltages for programming. Five-volt-only commands determine the read and programming operation of the device. Reading data out of the device is similar to reading from an EPROM. Reprogramming the AT49F512 is performed by erasing the entire 512K of memory and then programming on a byte by byte basis. The typical byte programming time is a fast 10 µs. The end of a program cycle can be optionally Pin Configurations DIP Top View continued Pin Name A0 - A15 CE OE WE I/O0 - I/O7 NC Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect VSOP Top View 8 x 14 mm or TSOP Top View 8 x 20 mm Type 1 NC 1 NC 2 A15 3 A12 4 A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 I/O0 13 I/O1 14 I/O2 15 GND 16 32 VCC 31 WE 30 NC 29 A14 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 I/O7 20 I/O6 19 I/O5 18 I/O4 17 I/O3 PLCC Top View 4 A12 3 A15 2 NC 1 NC 32 VCC 31 WE 30 NC A11 1 A9 2 A8 3 A13 4 A14 5 NC 6 WE 7 VCC 8 NC 9 NC 10 A15 11 A12 12 A7 13 A6 14 A5 15 A4 16 32 OE 31 A10 30 CE 29 I/O7 28 I/O6 27 I/O5 26 I/O4 25 I/O3 24 GND 23 I/O2 22 I/O1 21 I/O0 20 A0 19 A1 18 A2 17 A3 A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 I/O0 13 I/O1 14 I/O2 15 GND 16 I/O3 17 I/O4 18 I/O5 19 I/O6 20 29 A14 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 I/O7 512K 64K x 8 5-volt Only Flash Memory AT49F512 512K 64K x 8 5-volt Only CMOS Flash Memory detected by the DATA polling feature. Once the end of a byte program cycle has been detected, a new access for a read or program can begin. The typical number of program and erase cycles is in excess of 10,000 cycles. The optional 8K bytes boot block section includes a reprogramming write lock out feature to provide data integrity. The boot sector is designed to contain user secure code, and when the feature is enabled, the boot sector is permanently protected from being reprogrammed. Block Diagram FFFFH 2000H 1FFFH 0000H Device Operation READ The AT49F512 is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE or OE is high. This dual-line control gives designers flexibility in preventing bus contention. ERASURE Before a byte can be reprogrammed, the 64K bytes memory array or 56K bytes if the boot block featured is used must be erased. The erased state of the memory bits is a logical The entire device can be erased at one time by using a 6-byte software code. The chip erase code consists of 6-byte load commands to specific address locations with a specific data pattern please refer to the Chip Erase Cycle Waveforms . After the chip erase has been initiated, the device will internally time the erase operation so that no external clocks are required. The maximum time needed to erase the whole chip is tEC. If the boot block lockout feature has been enabled, the data in the boot sector will not be erased. BYTE PROGRAMMING Once the memory array is erased, the device is programmed to a logical “0” on a byte-by-byte basis. Please note that a data “0” cannot be programmed back to a “1” only erase operations can convert “0”s to “1”s. Programming is accomplished via the internal device command register and is a 4 bus cycle operation please refer to the Command Definitions table . The device will automatically generate the required internal program pulses. The program cycle has addresses latched on the falling edge of WE or CE, whichever occurs last, and the data Ordering Information 1 tACC ICC mA Active Standby Ordering Code AT49F512-50JC AT49F512-50PC AT49F512-50TC AT49F512-50VC Package 32J 32P6 32T 32V Operation Range Commercial 0° to 70°C AT49F512-50JI AT49F512-50PI AT49F512-50TI AT49F512-50VI 32J 32P6 32T 32V Industrial -40° to 85°C AT49F512-70JC AT49F512-70PC AT49F512-70TC AT49F512-70VC 32J 32P6 32T 32V Commercial 0° to 70°C AT49F512-70JI AT49F512-70PI AT49F512-70TI AT49F512-70VI 32J 32P6 32T 32V Industrial -40° to 85°C AT49F512-90JC AT49F512-90PC AT49F512-90TC AT49F512-90VC 32J 32P6 32T 32V Commercial 0° to 70°C AT49F512-90JI AT49F512-90PI AT49F512-90TI AT49F512-90VI 32J 32P6 32T 32V Industrial -40° to 85°C Note: The AT49F512 has as optional boot block feature. The part number shown in the Ordering Information table is for devices with the boot block in the lower address range i.e., 0000H to 1FFFH . Users requiring the boot block to be in the higher address range should contact Atmel. 32J 32P6 32T 32V Package Type 32-lead, Plastic, J-leaded Chip Carrier Package PLCC 32-lead, Wide, Plastic Dual Inline Package PDIP 32-lead, Thin Small Outline Package TSOP 8 x 20 mm 32-lead, Thin Small Outline Package VSOP 8 x 14 mm AT49F512 AT49F512 Packaging Information 32J, 32-lead, Plastic J-leaded Chip Carrier PLCC Dimensions in Inches and Millimeters JEDEC STANDARD MS-016 AE 32P6, 32-lead, Wide, Plastic Dual Inline Package PDIP Dimensions in Inches and Millimeters X PIN NO. 1 IDENTIFY AT CONTACT POINTS X MAX 3X 32T, 32-lead, Plastic Thin Small Outline Package TSOP Dimensions in Millimeters and Inches * PIN 1 SEATING PLANE 0 REF 15 32V, 32-lead, Plastic Thin Small Outline Package VSOP Dimensions in Millimeters and Inches * INDEX MARK INDEX MARK Controlling dimensions millimeters Controlling dimensions millimeters Atmel Headquarters Corporate Headquarters 2325 Orchard Parkway San Jose, CA 95131 TEL 408 441-0311 FAX 408 487-2600 Europe Atmel U.K., Ltd. Coliseum Business Centre Riverside Way Camberley, Surrey GU15 3YL England TEL 44 1276-686-677 FAX 44 1276-686-697 Asia Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL 852 2721-9778 FAX 852 2722-1369 Japan Atmel Japan K.K. 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL 81 3-3523-3551 FAX 81 3-3523-7581 Atmel Operations Atmel Colorado Springs 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 719 576-3300 FAX 719 540-1759 Atmel Rousset Zone Industrielle 13106 Rousset Cedex France TEL 33 4-4253-6000 FAX 33 4-4253-6001 Fax-on-Demand North America 1- 800 292-8635 International 1- 408 441-0732 e-mail Web Site BBS 1- 408 436-4309 Atmel Corporation Atmel Cor poration makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual proper ty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems. Marks bearing and/or are registered trademarks and trademarks of Atmel Corporation. Terms and product names in this document may be trademarks of others. Printed on recycled paper.

PDF Datasheet Preview

• Single Voltage Operation 5V Read 5V Reprogramming
• Fast Read Access Time - 50 ns
• Internal Program Control and Timer
• 8K Bytes Boot Block With Lockout
• Fast Erase Cycle Time - 10 seconds
• Byte-by-Byte Programming - 10 µs/Byte
• Hardware Data Protection
• DATA Polling For End Of Program Detection
• Low Power Dissipation
30 mA Active Current 100 µA CMOS Standby Current
• Typical 10,000 Write Cycles

The AT49F512 is a 5-volt-only in-system programmable and erasable Flash Memory. Its 512K of memory is organized as 65,536 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the devices offer access times to 50 ns with a power dissipation of just 165 mW over the commercial temperature range. When the device is deselected, the CMOS standby current is less than 100 µA.

To allow for simple in-system reprogrammability, the AT49F512 does not require high
input voltages for programming. Five-volt-only commands determine the read and
programming operation of the device. Reading data out of the device is similar to
reading from an EPROM. Reprogramming the AT49F512 is performed by erasing the
entire 512K of memory and then programming on a byte by byte basis. The typical
byte programming time is a fast 10 µs. The end of a program cycle can be optionally

Pin Configurations

DIP Top View
continued

Pin Name A0 - A15 CE OE WE I/O0 - I/O7 NC

Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs No Connect

VSOP Top View 8 x 14 mm or TSOP Top View 8 x 20 mm Type 1

NC 1 NC 2 A15 3 A12 4 A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 I/O0 13 I/O1 14 I/O2 15 GND 16
32 VCC 31 WE 30 NC 29 A14 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 I/O7 20 I/O6 19 I/O5 18 I/O4 17 I/O3

PLCC Top View
4 A12 3 A15 2 NC 1 NC 32 VCC 31 WE 30 NC

A11 1 A9 2 A8 3

A13 4 A14 5 NC 6 WE 7 VCC 8 NC 9 NC 10 A15 11 A12 12

A7 13 A6 14 A5 15 A4 16
32 OE 31 A10 30 CE 29 I/O7 28 I/O6 27 I/O5 26 I/O4 25 I/O3 24 GND 23 I/O2 22 I/O1 21 I/O0 20 A0 19 A1 18 A2 17 A3

A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 I/O0 13

I/O1 14 I/O2 15 GND 16 I/O3 17 I/O4 18 I/O5 19 I/O6 20
29 A14 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 I/O7
512K 64K x 8 5-volt Only Flash Memory AT49F512
512K 64K x 8 5-volt Only CMOS Flash Memory
detected by the DATA polling feature. Once the end of a byte program cycle has been detected, a new access for a read or program can begin. The typical number of program and erase cycles is in excess of 10,000 cycles.

The optional 8K bytes boot block section includes a reprogramming write lock out feature to provide data integrity. The boot sector is designed to contain user secure code, and when the feature is enabled, the boot sector is permanently protected from being reprogrammed.

Block Diagram

FFFFH
2000H 1FFFH
0000H

Device Operation

READ The AT49F512 is accessed like an EPROM. When CE and OE are low and WE is high, the data stored at the memory location determined by the address pins is asserted on the outputs. The outputs are put in the high impedance state whenever CE or OE is high. This dual-line control gives designers flexibility in preventing bus contention.

ERASURE Before a byte can be reprogrammed, the 64K bytes memory array or 56K bytes if the boot block featured is used must be erased. The erased state of the memory bits is a logical The entire device can be erased at one time by using a 6-byte software code. The chip erase code consists of 6-byte load commands to specific address locations with a specific data pattern please refer to the Chip Erase Cycle Waveforms .

After the chip erase has been initiated, the device will internally time the erase operation so that no external clocks are required. The maximum time needed to erase the whole chip is tEC. If the boot block lockout feature has been enabled, the data in the boot sector will not be erased.

BYTE PROGRAMMING Once the memory array is erased, the device is programmed to a logical “0” on a byte-by-byte basis. Please note that a data “0” cannot be programmed back to a “1” only erase operations can convert “0”s to “1”s. Programming is accomplished via the internal device command register and is a 4 bus cycle operation please refer to the Command Definitions table . The device will automatically generate the required internal program pulses.

The program cycle has addresses latched on the falling edge of WE or CE, whichever occurs last, and the data
Ordering Information 1
tACC

ICC mA

Active

Standby
Ordering Code

AT49F512-50JC AT49F512-50PC AT49F512-50TC AT49F512-50VC

Package
32J 32P6 32T 32V

Operation Range Commercial 0° to 70°C

AT49F512-50JI

AT49F512-50PI

AT49F512-50TI

AT49F512-50VI
32J 32P6 32T 32V

Industrial -40° to 85°C

AT49F512-70JC

AT49F512-70PC

AT49F512-70TC

AT49F512-70VC
32J 32P6 32T 32V

Commercial 0° to 70°C

AT49F512-70JI

AT49F512-70PI

AT49F512-70TI

AT49F512-70VI
32J 32P6 32T 32V

Industrial -40° to 85°C

AT49F512-90JC

AT49F512-90PC

AT49F512-90TC

AT49F512-90VC
32J 32P6 32T 32V

Commercial 0° to 70°C

AT49F512-90JI

AT49F512-90PI

AT49F512-90TI

AT49F512-90VI
32J 32P6 32T 32V

Industrial -40° to 85°C

Note:
The AT49F512 has as optional boot block feature. The part number shown in the Ordering Information table is for devices with the boot block in the lower address range i.e., 0000H to 1FFFH . Users requiring the boot block to be in the higher address range should contact Atmel.
32J 32P6 32T 32V

Package Type 32-lead, Plastic, J-leaded Chip Carrier Package PLCC 32-lead, Wide, Plastic Dual Inline Package PDIP 32-lead, Thin Small Outline Package TSOP 8 x 20 mm 32-lead, Thin Small Outline Package VSOP 8 x 14 mm

AT49F512

AT49F512

Packaging Information
32J, 32-lead, Plastic J-leaded Chip Carrier PLCC Dimensions in Inches and Millimeters

JEDEC STANDARD MS-016 AE
32P6, 32-lead, Wide, Plastic Dual Inline Package PDIP Dimensions in Inches and Millimeters

X PIN NO. 1 IDENTIFY

AT CONTACT POINTS

X MAX 3X
32T, 32-lead, Plastic Thin Small Outline Package TSOP Dimensions in Millimeters and Inches *

PIN 1

SEATING PLANE
0 REF 15
32V, 32-lead, Plastic Thin Small Outline Package VSOP Dimensions in Millimeters and Inches *

INDEX MARK

INDEX MARK
*Controlling dimensions millimeters
*Controlling dimensions millimeters

Atmel Headquarters

Corporate Headquarters 2325 Orchard Parkway San Jose, CA 95131 TEL 408 441-0311 FAX 408 487-2600

Europe Atmel U.K., Ltd. Coliseum Business Centre Riverside Way Camberley, Surrey GU15 3YL England TEL 44 1276-686-677 FAX 44 1276-686-697

Asia Atmel Asia, Ltd. Room 1219 Chinachem Golden Plaza 77 Mody Road Tsimhatsui East Kowloon Hong Kong TEL 852 2721-9778 FAX 852 2722-1369

Japan Atmel Japan K.K. 9F, Tonetsu Shinkawa Bldg. 1-24-8 Shinkawa Chuo-ku, Tokyo 104-0033 Japan TEL 81 3-3523-3551 FAX 81 3-3523-7581

Atmel Operations

Atmel Colorado Springs 1150 E. Cheyenne Mtn. Blvd. Colorado Springs, CO 80906 TEL 719 576-3300 FAX 719 540-1759

Atmel Rousset Zone Industrielle 13106 Rousset Cedex France TEL 33 4-4253-6000 FAX 33 4-4253-6001

Fax-on-Demand North America 1- 800 292-8635 International 1- 408 441-0732
e-mail

Web Site

BBS 1- 408 436-4309

Atmel Corporation Atmel Cor poration makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein. No licenses to patents or other intellectual proper ty of Atmel are granted by the Company in connection with the sale of Atmel products, expressly or by implication. Atmel’s products are not authorized for use as critical components in life support devices or systems.

Marks bearing and/or are registered trademarks and trademarks of Atmel Corporation. Terms and product names in this document may be trademarks of others.

Printed on recycled paper.

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AT49F512-90JC Datasheet file may be downloaded here without warranties.

Datasheet ID: AT49F512-90JC 518702