AT49F040A-55JI-T

AT49F040A-55JI-T Datasheet


AT49F040A

Part Datasheet
AT49F040A-55JI-T AT49F040A-55JI-T AT49F040A-55JI-T (pdf)
Related Parts Information
AT49F040A-55JI AT49F040A-55JI AT49F040A-55JI
AT49F040A-70TI AT49F040A-70TI AT49F040A-70TI
AT49F040A-55TI AT49F040A-55TI AT49F040A-55TI
AT49F040A-70JI AT49F040A-70JI AT49F040A-70JI
AT49F040A-55JU-T AT49F040A-55JU-T AT49F040A-55JU-T
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AT49F040A-55TU-T AT49F040A-55TU-T AT49F040A-55TU-T
AT49F040A-70JI-T AT49F040A-70JI-T AT49F040A-70JI-T
AT49F040A-70TI-T AT49F040A-70TI-T AT49F040A-70TI-T
AT49F040A-70TU-T AT49F040A-70TU-T AT49F040A-70TU-T
AT49F040A-55JU AT49F040A-55JU AT49F040A-55JU
AT49F040A-55TU AT49F040A-55TU AT49F040A-55TU
AT49F040A-70JU AT49F040A-70JU AT49F040A-70JU
AT49F040A-70TU AT49F040A-70TU AT49F040A-70TU
PDF Datasheet Preview
• Single-voltage Operation 5V Read 5V Reprogramming
• Fast Read Access Time 55 ns
• Internal Program Control and Timer
• Sector Architecture

One 16K Bytes Boot Block with Programming Lockout Two 8K Bytes Parameter Blocks Eight Main Memory Blocks One 32K Bytes, Seven 64K Bytes
• Fast Erase Cycle Time 6 Seconds
• Byte-by-Byte Programming 20 µs/Byte Typical
• Hardware Data Protection
• DATA Polling for End of Program Detection
• Low Power Dissipation 20 mA Active Current 70 µA CMOS Standby Current
• Typical 10,000 Write Cycles
• Green Pb/Halide-free Packaging Option
4-megabit 512K x 8 5-volt Only Flash Memory

AT49F040A

The AT49F040A is a 5-volt only in-system reprogrammable Flash memory. Its 4 megabits of memory is organized as 524,288 words by 8 bits. Manufactured with Atmel’s advanced nonvolatile CMOS technology, the device offers access times to 55 ns with power dissipation of just 110 mW over the commercial temperature range.

When the device is deselected, the CMOS standby current is less than 70 µA. To allow for simple in-system reprogrammability, the AT49F040A does not require high input voltages for programming. Five-volt-only commands determine the read and programming operation of the device. Reading data out of the device is similar to reading from an EPROM it has standard CE, OE, and WE inputs to avoid bus contention. Reprogramming the AT49F040A is performed by erasing a block of data and then programming on a byte-by-byte basis. The byte programming time is a fast 20 µs. The end of a program cycle can be optionally detected by the DATA polling feature. Once the end of a byte program cycle has been detected, a new access for a read or program can begin. The typical number of program and erase cycles is in excess of 10,000 cycles.

The device is erased by executing the erase command sequence the device internally controls the erase operations. There are two 8K byte parameter block sections, eight main memory blocks, and one boot block.

The device has the capability to protect the data in the boot block this feature is enabled by a command sequence. The 16K-byte boot block section includes a reprogramming lock out feature to provide data integrity. The boot sector is designed to contain user secure code, and when the feature is enabled, the boot sector is permanently protected from being reprogrammed.

Pin Configurations

Pin Name A0 - A18 CE OE WE I/O0 - I/O7
32-lead PLCC Top View

Function Addresses Chip Enable Output Enable Write Enable Data Inputs/Outputs
4 A12 3 A15 2 A16 1 A18 32 VCC 31 WE 30 A17

A7 5 A6 6 A5 7 A4 8 A3 9 A2 10 A1 11 A0 12 I/O0 13
32-lead TSOP Type 1 Top View 8 x 20 mm

A11 1 A9 2 A8 3

A13 4 A14 5 A17 6 WE 7 VCC 8 A18 9 A16 10 A15 11 A12 12

A7 13 A6 14 A5 15 A4 16

I/O1 14 I/O2 15 GND 16 I/O3 17 I/O4 18 I/O5 19 I/O6 20
29 A14 28 A13 27 A8 26 A9 25 A11 24 OE 23 A10 22 CE 21 I/O7
32 OE 31 A10 30 CE 29 I/O7 28 I/O6 27 I/O5 26 I/O4 25 I/O3 24 GND 23 I/O2 22 I/O1 21 I/O0 20 A0 19 A1 18 A2 17 A3
2 AT49F040A

Block Diagram

VCC GND

OE WE CE RESET

ADDRESS INPUTS

CONTROL LOGIC

Y DECODER

X DECODER

AT49F040A

AT49F040A DATA INPUTS/OUTPUTS

I/O7 - I/O0

INPUT/OUTPUT BUFFERS

PROGRAM DATA LATCHES

Y-GATING

MAIN MEMORY BLOCK 8
64K BYTES

MAIN MEMORY BLOCK 7
64K BYTES

MAIN MEMORY BLOCK 6
Ordering Information

Standard Package
tACC

ICC mA

Active

Standby
Ordering Code AT49F040A-55JI AT49F040A-55TI AT49F040A-70JI AT49F040A-70TI

Green Package Option Pb/Halide-free
tACC

ICC mA

Active
Standby Ordering Code

AT49F040A-55JU

AT49F040A-55TU

AT49F040A-70JU

AT49F040A-70TU

Package 32J 32T 32J 32T

Package 32J 32T 32J 32T

Operation Range Industrial
-40° to 85°C Industrial
-40° to 85°C

Operation Range Industrial
-40° to 85°C Industrial
-40° to 85°C

Package Type
32-lead, Plastic J-leaded Chip Carrier Package PLCC
32-lead, Plastic Thin Small Outline Package TSOP 8 x 20 mm
14 AT49F040A

Packaging Information
32J PLCC

AT49F040A

PIN NO. 1 IDENTIFIER
e D1 D

B1 E2

A2 A1 A
0.51 0.020 MAX 3X

COMMON DIMENSIONS Unit of Measure = mm

This package conforms to JEDEC reference MS-016, Variation AE. Dimensions D1 and E1 do not include mold protrusion.

Allowable protrusion is mm per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. Lead coplanarity is mm maximum.

SYMBOL MIN NOM MAX NOTE

Note 2

Note 2
10/04/01

TITLE 2325 Orchard Parkway 32J, 32-lead, Plastic J-leaded Chip Carrier PLCC R San Jose, CA 95131
32T TSOP

PIN 1
0º ~ 8º c

Pin 1 Identifier

SEATING PLANE

GAGE PLANE

This package conforms to JEDEC reference MO-142, Variation BD. Dimensions D1 and E do not include mold protrusion. Allowable
protrusion on E is mm per side and on D1 is mm per side. Lead coplanarity is mm maximum.
More datasheets: AT49F040A-55JI | AT49F040A-70TI | AT49F040A-55TI | AT49F040A-70JI | AT49F040A-55JU-T | AT49F040A-55TI-T | AT49F040A-55TU-T | AT49F040A-70JI-T | AT49F040A-70TI-T | AT49F040A-70TU-T


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Datasheet ID: AT49F040A-55JI-T 518693