AT49BV322D-70TU-T

AT49BV322D-70TU-T Datasheet

The AT49BV322D T is a 2.7-volt 32-megabit Flash memory organized as 2,097,152 words of 16 bits each or 4,194,304 bytes of 8 bits each. The x16 data appears on I/O0 - I/O15 the x8 data appears on I/O0 - I/O7. The memory is divided into 71 sectors for erase operations. The device is offered in a 48-lead TSOP and a 48-ball CBGA package. The device has CE and OE control signals to avoid any bus contention. This device can be read or reprogrammed using a single power supply, making it ideally suited for in-system programming.

Part	Datasheet
AT49BV322D-70TU-T	AT49BV322D-70TU-T (pdf)

Related Parts	Information
AT49BV322DT-70CU-T	AT49BV322DT-70CU-T
AT49BV322D-70CU-T	AT49BV322D-70CU-T
AT49BV322DT-70TU-T	AT49BV322DT-70TU-T
AT49BV322DT-70TU	AT49BV322DT-70TU
AT49BV322DT-70CU	AT49BV322DT-70CU
AT49BV322D-70CU	AT49BV322D-70CU
AT49BV322D-70TU	AT49BV322D-70TU

PDF Datasheet Preview
• Single Voltage Read/Write Operation 2.65V to 3.6V • Access Time 70 ns • Sector Erase Architecture Sixty-three 32K Word 64K Bytes Sectors with Individual Write Lockout Eight 4K Word 8K Bytes Sectors with Individual Write Lockout • Fast Word Program Time 10 µs • Fast Sector Erase Time 100 ms • Suspend/Resume Feature for Erase and Program Supports Reading and Programming from Any Sector by Suspending Erase of a Different Sector Supports Reading Any Byte/Word in the Non-suspending Sectors by Suspending Programming of Any Other Byte/Word • Low-power Operation 10 mA Active 15 µA Standby • Data Polling, Toggle Bit, Ready/Busy for End of Program Detection • VPP Pin for Write Protection and Accelerated Program Operation • RESET Input for Device Initialization • Sector Lockdown Support • TSOP and CBGA Package Options • Top or Bottom Boot Block Configuration Available • 128-bit Protection Register • Minimum 100,000 Erase Cycles • Common Flash Interface CFI The AT49BV322D T is a 2.7-volt 32-megabit Flash memory organized as 2,097,152 words of 16 bits each or 4,194,304 bytes of 8 bits each. The x16 data appears on I/O0 - I/O15 the x8 data appears on I/O0 - I/O7. The memory is divided into 71 sectors for erase operations. The device is offered in a 48-lead TSOP and a 48-ball CBGA package. The device has CE and OE control signals to avoid any bus contention. This device can be read or reprogrammed using a single power supply, making it ideally suited for in-system programming. The device powers on in the read mode. Command sequences are used to place the device in other operation modes such as program and erase. The device has the capability to protect the data in any sector see “Sector Lockdown” on page To increase the flexibility of the device, it contains an Erase Suspend and Program Suspend feature. This feature will put the erase or program on hold for any amount of time and let the user read data from or program data to any of the remaining sectors within the memory. The end of a program or an erase cycle is detected by the READY/BUSY pin, Data Polling or by the toggle bit. 32-megabit 2M x 16/4M x 8 3-volt Only Flash Memory AT49BV322D AT49BV322DT Not Recommended for New Design Contact Atmel to discuss the latest design in trends and options The VPP pin provides data protection. When the VPP input is below 0.4V, the program and erase functions are inhibited. When VPP is at 1.65V or above, normal program and erase operations can be performed. With VPP at 10.0V, the program Dual-word Program command operation is accelerated. A six-byte command Enter Single Pulse Program Mode sequence to remove the requirement of entering the three-byte program sequence is offered to further improve programming time. After entering the six-byte code, only single pulses on the write control lines are required for writing into the device. This mode Single Pulse Byte/Word Program is exited by powering down the device, or by pulsing the RESET pin low for a minimum of 500 ns and then bringing it back to VCC. Erase, Erase Suspend/Resume and Program Suspend/Resume commands will not work while in this mode if entered they will result in data being programmed into the device. It is not recommended that the six-byte code reside in the software of the final product but only exist in external programming code. The BYTE pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE pin is set at logic “1”, the device is in word configuration, I/O0 - I/O15 are active and controlled by CE and OE. If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-stated, and the I/O15 pin is used as an input for the LSB A-1 address function. 2 AT49BV322D T Pin Configurations Pin Name A0 - A20 CE OE WE RESET RDY/BUSY VPP I/O0 - I/O14 I/O15 A-1 BYTE NC TSOP Top View Type 1 AT49BV322D T Function Addresses Chip Enable Output Enable Write Enable Reset READY/BUSY Output Write Protection Data Inputs/Outputs I/O15 Data Input/Output, Word Mode A-1 LSB Address Input, Byte Mode Selects Byte or Word Mode No Connect A15 1 A14 2 A13 3 A12 4 A11 5 A10 6 A9 7 A8 8 A19 9 A20 10 WE 11 RESET 12 NC 13 VPP 14 RDY/BUSY 15 A18 16 A17 17 A7 18 A6 19 A5 20 A4 21 A3 22 A2 23 A1 24 48 A16 47 BYTE 46 GND 45 I/O15/A-1 44 I/O7 43 I/O14 42 I/O6 41 I/O13 40 I/O5 39 I/O12 38 I/O4 37 VCC 36 I/O11 35 I/O3 34 I/O10 33 I/O2 32 I/O9 31 I/O1 30 I/O8 29 I/O0 28 OE 27 GND 26 CE 25 A0 CBGA Top View Ball Down 123456 A3 A7 RDY/BUSY WE A9 A13 A4 A17 VPP RST A8 A12 A2 A6 A18 NC A10 A14 A1 A5 A20 A19 A11 A15 A0 I/O0 I/O2 I/O5 I/O7 A16 CE I/O8 I/O10 I/O12 I/O14 BYTE OE I/O9 I/O11 VCC I/O13 I/015/A-1 VSS I/O1 I/O3 I/O4 I/O6 VSS Block Diagram I/O0 - I/O15/A-1 OUTPUT BUFFER INPUT BUFFER A0 - A20 INPUT BUFFER Ordering Information Green Package Pb/Halide-free tACC ICC mA Active Standby Ordering Code AT49BV322D-70CU AT49BV322D-70TU AT49BV322DT-70CU AT49BV322DT-70TU AT49BV322D T Package 48C17 48T 48C17 48T Operation Range Industrial -40 to 85C Industrial -40 to 85C 48C17 48T Package Type 48-ball, Plastic Chip-Size Ball Grid Array Package CBGA 48-lead, Plastic Thin Small Outline Package TSOP Packaging Information 48C17 CBGA A1 Ball ID A B C D E F G H Top View A1 Ball Corner 6 54321 Bottom View Side View COMMON DIMENSIONS Unit of Measure = mm SYMBOL E E1 D D1 A A1 e b NOM MAX NOTE TITLE 2325 Orchard Parkway 48C17, 48-ball 6 x 8 Array , mm Pitch, R San Jose, CA 95131 x mm Chip-scale Ball Grid Array Package CBGA 10/26/05 48C17 30 AT49BV322D T 48T TSOP PIN 1 AT49BV322D T 0º ~ 8º c Pin 1 Identifier SEATING PLANE GAGE PLANE This package conforms to JEDEC reference MO-142, Variation DD. Dimensions D1 and E do not include mold protrusion. Allowable protrusion on E is mm per side and on D1 is mm per side. Lead coplanarity is mm maximum. COMMON DIMENSIONS Unit of Measure = mm SYMBOL A A1 A2 D D1 E L L1 b c e MIN NOM MAX

PDF Datasheet Preview

• Single Voltage Read/Write Operation 2.65V to 3.6V
• Access Time 70 ns
• Sector Erase Architecture

Sixty-three 32K Word 64K Bytes Sectors with Individual Write Lockout Eight 4K Word 8K Bytes Sectors with Individual Write Lockout
• Fast Word Program Time 10 µs
• Fast Sector Erase Time 100 ms
• Suspend/Resume Feature for Erase and Program Supports Reading and Programming from Any Sector by Suspending Erase
of a Different Sector Supports Reading Any Byte/Word in the Non-suspending Sectors by Suspending

Programming of Any Other Byte/Word
• Low-power Operation
10 mA Active 15 µA Standby
• Data Polling, Toggle Bit, Ready/Busy for End of Program Detection
• VPP Pin for Write Protection and Accelerated Program Operation
• RESET Input for Device Initialization
• Sector Lockdown Support
• TSOP and CBGA Package Options
• Top or Bottom Boot Block Configuration Available
• 128-bit Protection Register
• Minimum 100,000 Erase Cycles
• Common Flash Interface CFI

The AT49BV322D T is a 2.7-volt 32-megabit Flash memory organized as 2,097,152 words of 16 bits each or 4,194,304 bytes of 8 bits each. The x16 data appears on I/O0 - I/O15 the x8 data appears on I/O0 - I/O7. The memory is divided into 71 sectors for erase operations. The device is offered in a 48-lead TSOP and a 48-ball CBGA package. The device has CE and OE control signals to avoid any bus contention. This device can be read or reprogrammed using a single power supply, making it ideally suited for in-system programming.

The device powers on in the read mode. Command sequences are used to place the device in other operation modes such as program and erase. The device has the capability to protect the data in any sector see “Sector Lockdown” on page

To increase the flexibility of the device, it contains an Erase Suspend and Program Suspend feature. This feature will put the erase or program on hold for any amount of time and let the user read data from or program data to any of the remaining sectors within the memory. The end of a program or an erase cycle is detected by the READY/BUSY pin, Data Polling or by the toggle bit.
32-megabit 2M x 16/4M x 8 3-volt Only Flash Memory

AT49BV322D AT49BV322DT

Not Recommended for New Design

Contact Atmel to discuss the latest design in trends and options

The VPP pin provides data protection. When the VPP input is below 0.4V, the program and erase functions are inhibited. When VPP is at 1.65V or above, normal program and erase operations can be performed. With VPP at 10.0V, the program Dual-word Program command operation is accelerated.

A six-byte command Enter Single Pulse Program Mode sequence to remove the requirement of entering the three-byte program sequence is offered to further improve programming time. After entering the six-byte code, only single pulses on the write control lines are required for writing into the device. This mode Single Pulse Byte/Word Program is exited by powering down the device, or by pulsing the RESET pin low for a minimum of 500 ns and then bringing it back to VCC. Erase, Erase Suspend/Resume and Program Suspend/Resume commands will not work while in this mode if entered they will result in data being programmed into the device. It is not recommended that the six-byte code reside in the software of the final product but only exist in external programming code.

The BYTE pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE pin is set at logic “1”, the device is in word configuration, I/O0 - I/O15 are active and controlled by CE and OE.

If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-stated, and the I/O15 pin is used as an input for the LSB A-1 address function.
2 AT49BV322D T

Pin Configurations

Pin Name A0 - A20 CE OE WE RESET RDY/BUSY VPP I/O0 - I/O14 I/O15 A-1 BYTE NC

TSOP Top View Type 1

AT49BV322D T

Function Addresses Chip Enable Output Enable Write Enable Reset READY/BUSY Output Write Protection Data Inputs/Outputs I/O15 Data Input/Output, Word Mode A-1 LSB Address Input, Byte Mode Selects Byte or Word Mode No Connect

A15 1 A14 2 A13 3 A12 4 A11 5 A10 6

A9 7 A8 8 A19 9 A20 10 WE 11 RESET 12 NC 13 VPP 14 RDY/BUSY 15 A18 16 A17 17 A7 18 A6 19 A5 20 A4 21 A3 22 A2 23 A1 24
48 A16 47 BYTE 46 GND 45 I/O15/A-1 44 I/O7 43 I/O14 42 I/O6 41 I/O13 40 I/O5 39 I/O12 38 I/O4 37 VCC 36 I/O11 35 I/O3 34 I/O10 33 I/O2 32 I/O9 31 I/O1 30 I/O8 29 I/O0 28 OE 27 GND 26 CE 25 A0

CBGA Top View Ball Down
123456

A3 A7 RDY/BUSY WE A9 A13

A4 A17 VPP RST A8 A12

A2 A6 A18 NC A10 A14

A1 A5 A20 A19 A11 A15

A0 I/O0 I/O2 I/O5 I/O7 A16

CE I/O8 I/O10 I/O12 I/O14 BYTE

OE I/O9 I/O11 VCC I/O13 I/015/A-1

VSS I/O1 I/O3 I/O4 I/O6 VSS

Block Diagram

I/O0 - I/O15/A-1

OUTPUT BUFFER

INPUT BUFFER

A0 - A20

INPUT BUFFER
Ordering Information

Green Package Pb/Halide-free
tACC

ICC mA

Active

Standby
Ordering Code

AT49BV322D-70CU AT49BV322D-70TU

AT49BV322DT-70CU AT49BV322DT-70TU

AT49BV322D T

Package
48C17 48T
48C17 48T

Operation Range Industrial
-40 to 85C Industrial
-40 to 85C
48C17 48T

Package Type 48-ball, Plastic Chip-Size Ball Grid Array Package CBGA 48-lead, Plastic Thin Small Outline Package TSOP

Packaging Information
48C17 CBGA

A1 Ball ID

A B C D E F G H

Top View

A1 Ball Corner
6 54321

Bottom View

Side View

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL E E1 D D1 A A1 e b

NOM MAX

NOTE

TITLE 2325 Orchard Parkway 48C17, 48-ball 6 x 8 Array , mm Pitch, R San Jose, CA 95131 x mm Chip-scale Ball Grid Array Package CBGA
10/26/05
48C17
30 AT49BV322D T
48T TSOP

PIN 1

AT49BV322D T
0º ~ 8º c

Pin 1 Identifier

SEATING PLANE

GAGE PLANE

This package conforms to JEDEC reference MO-142, Variation DD. Dimensions D1 and E do not include mold protrusion. Allowable
protrusion on E is mm per side and on D1 is mm per side. Lead coplanarity is mm maximum.

COMMON DIMENSIONS Unit of Measure = mm

SYMBOL A A1 A2 D D1 E L L1 b c e

MIN NOM MAX

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived AT49BV322D-70TU-T Datasheet file may be downloaded here without warranties.

Datasheet ID: AT49BV322D-70TU-T 518673