AT49BV3218-11TI
AT49BV3218-11TI Datasheet
The AT49BV/LV3218 T is a to 3.3-volt BV /3.0V to 3.6V LV 32-megabit Flash memory organized as 2,097,152 words of 16 bits each or 4,194,304 bytes of 8 bits each. The x16 data appears on I/O0 - I/O15 the x8 data appears on I/O0 - I/O7. The memory is divided into 71 sectors for erase operations. The device is offered in 48lead TSOP and 48-ball CBGA packages. The device has CE and OE control signals to avoid any bus contention. This device can be read or reprogrammed using a single 2.65V power supply, making it ideally suited for in-system programming.
| Part | Datasheet |
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AT49BV3218-11TI |
AT49BV3218-11TI (pdf) |
| Related Parts | Information |
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AT49BV3218-11CI |
AT49BV3218-11CI |
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AT49BV3218-90CI |
AT49BV3218-90CI |
AT49BV3218-90TI |
AT49BV3218-90TI |
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AT49BV3218T-11CI |
AT49BV3218T-11CI |
AT49BV3218T-11TI |
AT49BV3218T-11TI |
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AT49BV3218T-90CI |
AT49BV3218T-90CI |
AT49BV3218T-90TI |
AT49BV3218T-90TI |
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| • Single Voltage Read/Write Operation 2.65V to 3.3V BV , 3.0V to 3.6V LV • Access Time 85 ns • Sector Erase Architecture Sixty-three 32K Word 64K Byte Sectors with Individual Write Lockout Eight 4K Word 8K Byte Sectors with Individual Write Lockout • Fast Word Program Time 15 µs • Fast Sector Erase Time 200 ms • Dual-plane Organization, Permitting Concurrent Read while Program/Erase Memory Plane A Eight 4K Word and Fifteen 32K Word Sectors Memory Plane B Forty-eight 32K Word Sectors • Erase Suspend Capability Supports Reading/Programming Data from Any Sector by Suspending Erase of Any Different Sector • Low-power Operation 25 mA Active 10 µA Standby • Data Polling, Toggle Bit, Ready/Busy for End of Program Detection • RESET Input for Device Initialization • Sector Lockdown Support • TSOP and CBGA Package Options • Top or Bottom Boot Block Configuration Available • 128-bit Protection Register The AT49BV/LV3218 T is a to 3.3-volt BV /3.0V to 3.6V LV 32-megabit Flash memory organized as 2,097,152 words of 16 bits each or 4,194,304 bytes of 8 bits each. The x16 data appears on I/O0 - I/O15 the x8 data appears on I/O0 - I/O7. The memory is divided into 71 sectors for erase operations. The device is offered in 48lead TSOP and 48-ball CBGA packages. The device has CE and OE control signals to avoid any bus contention. This device can be read or reprogrammed using a single 2.65V power supply, making it ideally suited for in-system programming. Pin Configurations Pin Name A0 - A20 CE OE WE RESET RDY/BUSY VPP I/O0 - I/O14 I/O15 A-1 BYTE NC Function Addresses Chip Enable Output Enable Write Enable Reset READY/BUSY Output Optional Power Supply Data Inputs/Outputs I/O15 Data Input/Output, Word Mode A-1 LSB Address Input, Byte Mode Selects Byte or Word Mode No Connect 32-megabit 2M x 16/4M x 8 3-volt Only Flash Memory AT49BV3218 AT49BV3218T AT49LV3218 AT49LV3218T Not Recommended for New Designs. New Designs Should Use AT49BV/LV320 T /321 T TSOP Top View Type 1 A15 1 A14 2 A13 3 A12 4 A11 5 A10 6 A9 7 A8 8 A19 9 A20 10 WE 11 RESET 12 VPP* 13 NC* 14 RDY/BUSY 15 A18 16 A17 17 A7 18 A6 19 A5 20 A4 21 A3 22 A2 23 A1 24 48 A16 47 BYTE 46 GND 45 I/O15/A-1 44 I/O7 43 I/O14 42 I/O6 41 I/O13 40 I/O5 39 I/O12 38 I/O4 37 VCC 36 I/O11 35 I/O3 34 I/O10 33 I/O2 32 I/O9 31 I/O1 30 I/O8 29 I/O0 28 OE 27 GND 26 CE 25 A0 CBGA Top View 123456 A3 A7 RDY/BUSY WE A9 A13 A4 A17 NC* RESET A8 A12 A2 A6 A18 VPP* A10 A14 A1 A5 A20 A19 A11 A15 A0 I/O0 I/O2 I/O5 I/O7 A16 CE I/O8 I/O10 I/O12 I/O14 BYTE OE I/O9 I/O11 VCC I/O13 I/O15/A-1 VSS I/O1 I/O3 I/O4 I/O6 VSS Note *Either pin 13 or pin 14 TSOP package or ball B3 or ball C4 CBGA package can be connected to VPP or both pins can be unconnected. The device powers on in the read mode. Command sequences are used to place the device in other operation modes such as program and erase. The device has the capability to protect the data in any sector see Sector Lockdown section . The device is segmented into two memory planes. Reads from memory plane B may be performed even while program or erase functions are being executed in memory plane A and vice versa. This operation allows improved system performance by not requiring the system to wait for a program or erase operation to complete before a read is performed. To further increase the flexibility of the device, it contains an Erase Suspend feature. This feature will put the erase on hold for any amount of time and let the user read data from or program data to any of the remaining sectors within the same memory plane. There is no reason to suspend the erase operation if the data to be read is in the other memory plane. The end of a program or an erase cycle is detected by the Ready/Busy pin, Data Polling or by the toggle bit. A six-byte command Enter Single Pulse Program Mode sequence to remove the requirement of entering the three-byte program sequence is offered to further improve programming time. After entering the six-byte code, only single pulses on the write control lines are required for writing into the device. This mode Single Pulse Byte/Word Program is exited by powering down the device, or by pulsing the RESET pin low for a minimum of 500 ns and then bringing it back to VCC. Erase and Erase Suspend/Resume commands will not work while in this mode if entered they will result in data being programmed into the device. It is not recommended that the six-byte code reside in the software of the final product but only exist in external programming code. The BYTE pin controls whether the device data I/O pins operate in the byte or word configuration. If the BYTE pin is set at logic “1”, the device is in word configuration, I/O0 I/O15 are active and controlled by CE and OE. If the BYTE pin is set at logic “0”, the device is in byte configuration, and only data I/O pins I/O0 - I/O7 are active and controlled by CE and OE. The data I/O pins I/O8 - I/O14 are tri-stated, and the I/O15 pin is used as an input for the LSB A-1 address function. 2 AT49BV/LV3218 T Block Diagram I/O0 - I/O15/A-1 AT49BV/LV3218 T OUTPUT BUFFER INPUT BUFFER A0 - A20 INPUT BUFFER ADDRESS LATCH Y-DECODER X-DECODER OUTPUT MULTIPLEXER DATA REGISTER AT49BV3218 T Ordering Information tACC ICC mA Active Standby Ordering Code AT49BV3218-85CI AT49BV3218-85TI AT49BV3218-90CI AT49BV3218-90TI AT49BV3218-11CI AT49BV3218-11TI AT49BV3218T-85CI AT49BV3218T-85TI AT49BV3218T-90CI AT49BV3218T-90TI AT49BV3218T-11CI AT49BV3218T-11TI AT49LV3218 T Ordering Information tACC ICC mA Active Standby Ordering Code AT49LV3218-90CI AT49LV3218-90TI AT49LV3218T-90CI AT49LV3218T-90TI Package 48C16 48T 48C16 48T 48C16 48T 48C16 48T 48C16 48T 48C16 48T Operation Range Industrial -40° to 85°C Industrial -40° to 85°C Industrial -40° to 85°C Industrial -40° to 85°C Industrial -40° to 85°C Industrial -40° to 85°C Package 48C16 48T 48C16 48T Operation Range Industrial -40° to 85°C Industrial -40° to 85°C 48C16 48T Package Type 48-ball, Plastic Chip-Size Ball Grid Array Package CBGA 48-lead, Plastic Thin Small Outline Package TSOP 22 AT49BV/LV3218 T Packaging Information 48C16 CBGA A1 Ball ID AT49BV/LV3218 T Top View A1 Ball Corner Side View A B C D E F G H 6 54321 Bottom View COMMON DIMENSIONS Unit of Measure = mm SYMBOL E E1 D D1 A A1 e b NOTE TITLE 2325 Orchard Parkway 48C16, Formerly 48C7 , 48-ball 6 x 8 Array , mm Pitch, R San Jose, CA 95131 x mm Chip-scale Ball Grid Array Package CBGA |
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