MCDP2850BC

MCDP2850BC Datasheet

MCDP28x0 DisplayPort1.2a to HDMI2.0 Level Shifter/Protocol Converter

Part	Datasheet
MCDP2850BC	MCDP2850BC (pdf)

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MCDP28x0 DisplayPort1.2a to HDMI2.0 Level Shifter/Protocol Converter [LSPCON] Datasheet MegaChips’ Proprietary Information MegaChips reserves the right to make any change herein at any time without prior notice. MegaChips does not assume any responsibility or liability arising out of application or use of any product or service described herein except as explicitly agreed upon. MegaChips’ Proprietary Information Page 1 of 33 MCDP28x0 • DP ver. 1.2a receiver Link rate HBR2/HBR/RBR 1, 2, or 4 lanes configuration AUX CH 1 Mbps, HPD out Supports eDP ASSR scrambler operation • HDMI ver. transmitter Max data rate up to Gbps/ch Deep color up to 16 bits per color 3D video timings, CEC, HPD in Supports High Dynamic Range HDR Supports scrambling for the higher data rate • Level shifter operation up to 3.4Gbps/ch AC-coupled HDMI1.4b to DC-coupled HDMI1.4b PHY analog repeater re-driver or re-timer V DDC/AUX CH signaling support with auto detect V DDC to 5V DDC buffering I2C-over-AUX to 5V DDC translation DP HPD_OUT matched to HDMI HPD_IN • Protocol converter operation up to Gbps/ch DP SST-to-HDMI format conversion Video and audio forwarding Pixel encoding format conversion from YCbCr444 to YCbCr420 Horizontal expansion of VESA CVT to CEA-861 timings Meta data handing • Level shifter Protocol converter mode switching Via sideband communication AUX CH/ DDC • Max video resolution and color depth 4Kp60Hz, RGB/YCbCr444, 8bpc 4Kp60Hz, YCbCr420, up to 16bpc 4Kp30Hz, RGB/YCbCr444, up to 16bpc • YCbCr420 support YCbCr444-to-420 conversion, up to 16 bpc YCbCr420 pass through, up to 16 bpc • Stereoscopic 3D forwarding Conversion from frame sequential over DP to stacked top-bottom 3D over HDMI All other 3D formats forwarded as is • Audio forwarding 2-ch, 768 kHz 24bps HBR audio Up to 8-ch, 192 kHz, 24bps LPCM audio, AC3, DTS • Secure communication Intel secure communication protocol compliant with LSPCON spec • HDCP content protection Embedded HDCP keys HDCP2.2 transmitter HDCP1.x repeater • Metadata handling HDMI TX DVI/HDMI mode setting DPCD register YCbCr444-420 conversion DPCD register IEC60958 BYTE3 channel status overwrite CEA861F INFOFRAME generation CEA861-3 HDR and Mastering InfoFrame • SCDC read request handling Polling enabled for HDMI sinks not supporting read request • AUX to I2C bridge for EDID/MCCS pass through • CEC tunneling over AUX CH • Device configuration options SPI flash for firmware binary image storage required AUX CH, I2C host interface optional • EMI reduction support Spread spectrum for DP input Scrambler for DP input and HDMI2.0a output • Low power operation 412 mW in protocol converter mode 100 mW in Level shifter mode mW in connected standby mode • ESD specification KV HBM, 500 V CDM • Package 64 LFBGA 7 x 7 mm • Power supply voltages V I/O V core C28x0-DAT-01p MegaChips’ Proprietary Information Page 2 of 33 MCDP28x0 • PC notebook/ tablet motherboard • DP/USB Type-C docking station, dongle HPD Out 3.3V Tol HPD 5V SAFE 3.3V IO AUX, AC 3.3V I2C DC 3.3V AUX/I2C Detector Figure MCDP28x0 internal block diagram From OCM To OCM Ordering information 31 C28x0-DAT-01p MegaChips’ Proprietary Information Page 4 of 33 MCDP28x0 List of Tables Table C28x0-DAT-01p MegaChips’ Proprietary Information Page 5 of 33 MCDP28x0 List of Figures Figure MCDP28x0 internal block diagram 3 MCDP2800 motherboard-down use case. 9 MCDP2850 adaptor dongle use case 10 MCDP28x0 BGA diagram 11 RESETN Connection to MCDP28x0. 19 MCDP28x0 package drawing 20 MCDP28x0 package dimensions 21 Marking template 22 I2C timing 29 C28x0-DAT-01p MegaChips’ Proprietary Information Page 6 of 33 MCDP28x0 The MCDP28x0 is a power-optimized DisplayPort1.2a-to-HDMI converter device targeted for desktop/mobile PC motherboard-down applications and for DP or USB type-C adaptor dongle, docking station applications. This device functions as a level shifter as well as an active protocol converter. In level shifter mode, the device functions as a PHY repeater with optional jitter removal capability. This operating mode provides a low-power means of using an AC-coupled TMDS signal from a dual mode DP++ source to be repeated to the HDMI output. The maximum TMDS character clock frequency in this mode is limited to 340 Mchar/s per HDMI1.4b specification . In Protocol Converter PCON mode, MCDP28x0 functions as a DP branch device receiving AC coupled DisplayPort stream and converting it to HDMI output. The maximum TMDS character clock frequency supported in this mode is up to 600 Mchar/s as per the HDMI2.0a specification . The MCDP28x0 operates with two power supply voltages V and V. It consumes: • 100 mW in PHY analog repeater mode • 412 mW in protocol converter mode • mW in connected standby mode V power rail disabled The MCDP28x0 has a DisplayPort1.2a dual-mode receiver and HDMI 2.0a transmitter. The upstream main link can receive DP input at HBR2 rate over 4 lanes and AC-coupled TMDS signal up to 340Mchar/s. It supports DP SST stream on its main link and Manchester-coded AUX signaling or native I2C signaling as the side band channel with the DP++ source. The downstream HDMI TX port is HDMI specification compliant. The MCDP28x0 is capable of supporting Ultra High-Definition video formats, resolutions as high as 4096 x Hz. It supports RGB/YCbCr video color formats with a color depth of 16 bpc or 48 bits per pixel as long as it fits within the DP1.2 and HDMI2.0a link rate. In addition, this device also supports pixel encoding conversion from YCbCr444 to YCbCr420 and YcbCr420 pass-through from a DP input to an HDMI output. High Dynamic Range HDR with deep color up to 12bpc at 4Kp60Hz is supported through the conversion of YCbCr444 CVT timing over DP link with horizontal expansion to YCbCr420 CEA timing on the HDMI TX output. This device offers secure reception and transmission of high bandwidth digital audio and video content with HDCP 1.x content protection for the upstream DP interface and HDCP2.2 for the downstream HDMI interface. It also operates as an HDCP1.x repeater between the source and the sink. In addition, it conforms to the secure communication protocol specified in the Intel “LSPCON Security Requirements C28x0-DAT-01p MegaChips’ Proprietary Information Page 7 of 33 MCDP28x0 Architecture Specification” document. The MCDP28x0 comes with embedded HDCP keys that are stored in encrypted form. The MCDP28x0 uses an external crystal of 27 MHz as a reference clock for its operation and it has a reset input which provides the chip reset during system power up. The device has an on-chip microcontroller with SPI, UART, and I2C interfaces for system level communication and debug. It requires an external SPI flash memory for storing device configuration firmware. The firmware update is done through the DP AUX channel or through UART interface. An 8 Mbit SPI flash memory is recommended for storing the firmware with a backup option as fail-safe during in-system-programming. C28x0-DAT-01p MegaChips’ Proprietary Information Page 8 of 33 MCDP28x0 Application overview Two important target applications of MCDP28x0 are • Mobile PC motherboard application. This is referred as motherboard-down topology and the part number that supports this topology is MCDP2800. • Accessory application dongle, docking station etc. . This is referred as adaptor topology and the part number for this topology is MCDP2850. Motherboard-down topology In a Motherboard-down topology, the MCDP2800 resides next to the source CPU/GPU device on a same PCB with relatively short copper tracks connecting directly to the source. These tracks are typically micro stripes with controlled impedance of 100 In this configuration, the source device is aware of the presence and capabilities of the MCDP2800. The source communicates with MCDP2800 through AUX/DDC interface via I2C-over-AUX or native I2C 3.3V messaging. In this topology, typically the MCDP2800 operates as a re-driving or re-timing analog repeater for AC-coupled TMDS input for speeds below 3.4Gbps and as a DisplayPort to HDMI protocol converter for speeds above Gbps up to Gbps. The analog repeater mode saves the active power consumption during low frequency oeprtation. MCDP2800 however is capable of operating as DP to HDMI protocol converter for the entire operating range up to 6 Gbps. The motherboard-down topology supports transmitting both HDCP1.x and HDCP2.2 protected content over the HDMI output. Figure MCDP2800 motherboard-down use case Ordering information MCDP28x0 Part number MCDP2800-BBES MCDP2800-BB MCDP2800-BBT MCDP2850-BB MCDP2850-BBT MCDP2800-BC MCDP2800-BCT MCDP2850-BC MCDP2850-BCT Table Order codes C28x0-DAT-01p MegaChips’ Proprietary Information Page 31 of 33 MCDP28x0 Date 09-Mar-2016 07-Apr-2016 Changes Initial version. Updated HDMI2.0 to HDMI2.0a throughout the datasheet. Added sub-bullet to Features section. C28x0-DAT-01p MegaChips’ Proprietary Information Page 32 of 33 MCDP28x0 Notice Semiconductor products may possibly experience breakdown or malfunction. Adequate care should be taken with respect to the safety design of equipment in order to prevent the occurrence of human injury, fire or social loss in the event of breakdown or malfunction of semiconductor products The overview of operations and illustration of applications described in this document indicate the conceptual method of use of the semiconductor product and do not guarantee operability in equipment in which the product is actually used. The names of companies and trademarks stated in this document are registered trademarks of the relevant companies. MegaChips Co. provides no guarantees nor grants any implementation rights with respect to industrial property rights, intellectual property rights and other such rights belonging to third parties or/and MegaChips Co. in the use of products and of technical information including information on the overview of operations and the circuit diagrams that are described in this document. The product described in this document may possibly be considered goods or technology regulated by the Foreign Currency and Foreign Trade Control Law. In the event such law applies, export license will be required under said law when exporting the product. This regulation shall be valid in Japan domestic. In the event the intention is to use the product described in this document in applications that require an extremely high standard of reliability such as nuclear systems, aerospace equipment or medical equipment for life support, please contact the sales department of MegaChips Co. in advance. All information contained in this document is subject to change without notice. Copyright 2016 MegaChips Corporation All rights reserved MegaChips Corporation Head Quarters 1-1-1 Miyahara, Yodogawa-ku Osaka 532-0003, Japan TEL +81-6-6399-2884 MegaChips Corporation Tokyo Office 17-6 Ichiban-cho, Chiyoda-ku, Tokyo 102-0082, Japan TEL +81-3-3512-5080 MegaChips Corporation Makuhari Office 1-3 Nakase Mihama-ku Chiba 261-8501, Japan TEL +81-43-296-7414 MegaChips Corporation San Jose Office 2033 Gateway Place, Suite 400, San Jose, CA 95110 U.S.A. TEL +1-408-570-0555 MegaChips Corporation India Branch 17th Floor, Concorde Block UB City, Vittal Mallya Road, Bangalore 560-001, India TEL +91-80-4041-3999 MegaChips Corporation Taiwan Branch RM. B 2F, Worldwide House, No.129, Min Sheng E. Rd., Sec. 3, Taipei 105, Taiwan TEL +886-2-2547-1297 MegaChips Corporation Tainan Office RM. 2, 8F, No.24, Da Qiao 2 Rd., Yong Kang Dist., Tainan 710, Taiwan TEL +886-6-302-2898 MegaChips Corporation Zhunan Office No.118, Chung-Hua Rd., Chu-Nan, Miao-Li 350, Taiwan TEL +886-37-666-156 MegaChips Corporation Shenzhen Office Room 6307, Office Tower, Shun Hing Square, 5002 Shen Nan Dong Road, Luohu District, Shenzhen 518000, P. R. China TEL +86-755-3664-6990 C28x0-DAT-01p MegaChips’ Proprietary Information Page 33 of 33

PDF Datasheet Preview

MCDP28x0 DisplayPort1.2a to HDMI2.0 Level Shifter/Protocol Converter
[LSPCON] Datasheet

MegaChips’ Proprietary Information

MegaChips reserves the right to make any change herein at any time without prior notice. MegaChips does not assume any responsibility or liability arising out of application or use of any product or service described herein except as explicitly agreed upon.

MegaChips’ Proprietary Information

Page 1 of 33

MCDP28x0
• DP ver. 1.2a receiver Link rate HBR2/HBR/RBR 1, 2, or 4 lanes configuration AUX CH 1 Mbps, HPD out Supports eDP ASSR scrambler operation
• HDMI ver. transmitter Max data rate up to Gbps/ch Deep color up to 16 bits per color 3D video timings, CEC, HPD in Supports High Dynamic Range HDR Supports scrambling for the higher data rate
• Level shifter operation up to 3.4Gbps/ch AC-coupled HDMI1.4b to DC-coupled HDMI1.4b PHY analog repeater re-driver or re-timer V DDC/AUX CH signaling support with auto detect V DDC to 5V DDC buffering I2C-over-AUX to 5V DDC translation DP HPD_OUT matched to HDMI HPD_IN
• Protocol converter operation up to Gbps/ch DP SST-to-HDMI format conversion Video and audio forwarding Pixel encoding format conversion from YCbCr444 to YCbCr420 Horizontal expansion of VESA CVT to CEA-861 timings Meta data handing
• Level shifter Protocol converter mode switching Via sideband communication AUX CH/ DDC
• Max video resolution and color depth 4Kp60Hz, RGB/YCbCr444, 8bpc 4Kp60Hz, YCbCr420, up to 16bpc 4Kp30Hz, RGB/YCbCr444, up to 16bpc
• YCbCr420 support YCbCr444-to-420 conversion, up to 16 bpc YCbCr420 pass through, up to 16 bpc
• Stereoscopic 3D forwarding Conversion from frame sequential over DP to stacked top-bottom 3D over HDMI

All other 3D formats forwarded as is
• Audio forwarding 2-ch, 768 kHz 24bps HBR audio Up to 8-ch, 192 kHz, 24bps LPCM audio, AC3, DTS
• Secure communication Intel secure communication protocol compliant with LSPCON spec
• HDCP content protection Embedded HDCP keys HDCP2.2 transmitter HDCP1.x repeater
• Metadata handling HDMI TX DVI/HDMI mode setting DPCD register YCbCr444-420 conversion DPCD register IEC60958 BYTE3 channel status overwrite CEA861F INFOFRAME generation CEA861-3 HDR and Mastering InfoFrame
• SCDC read request handling Polling enabled for HDMI sinks not supporting read request
• AUX to I2C bridge for EDID/MCCS pass through
• CEC tunneling over AUX CH
• Device configuration options SPI flash for firmware binary image storage required AUX CH, I2C host interface optional
• EMI reduction support Spread spectrum for DP input Scrambler for DP input and HDMI2.0a output
• Low power operation 412 mW in protocol converter mode 100 mW in Level shifter mode mW in connected standby mode
• ESD specification KV HBM, 500 V CDM
• Package 64 LFBGA 7 x 7 mm
• Power supply voltages V I/O V core

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MCDP28x0
• PC notebook/ tablet motherboard
• DP/USB Type-C docking station, dongle

HPD Out 3.3V Tol

HPD 5V SAFE 3.3V IO

AUX, AC 3.3V I2C DC 3.3V

AUX/I2C Detector

Figure MCDP28x0 internal block diagram

From OCM

To OCM
Ordering information 31

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MCDP28x0

List of Tables

Table

C28x0-DAT-01p

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MCDP28x0

List of Figures

Figure

MCDP28x0 internal block diagram 3 MCDP2800 motherboard-down use case. 9 MCDP2850 adaptor dongle use case 10 MCDP28x0 BGA diagram 11 RESETN Connection to MCDP28x0. 19 MCDP28x0 package drawing 20 MCDP28x0 package dimensions 21 Marking template 22 I2C timing 29

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MCDP28x0

The MCDP28x0 is a power-optimized DisplayPort1.2a-to-HDMI converter device targeted for desktop/mobile PC motherboard-down applications and for DP or USB type-C adaptor dongle, docking station applications. This device functions as a level shifter as well as an active protocol converter.

In level shifter mode, the device functions as a PHY repeater with optional jitter removal capability. This operating mode provides a low-power means of using an AC-coupled TMDS signal from a dual mode DP++ source to be repeated to the HDMI output. The maximum TMDS character clock frequency in this mode is limited to 340 Mchar/s per HDMI1.4b specification .

In Protocol Converter PCON mode, MCDP28x0 functions as a DP branch device receiving AC coupled DisplayPort stream and converting it to HDMI output. The maximum TMDS character clock frequency supported in this mode is up to 600 Mchar/s as per the HDMI2.0a specification .

The MCDP28x0 operates with two power supply voltages V and V. It consumes:
• 100 mW in PHY analog repeater mode
• 412 mW in protocol converter mode
• mW in connected standby mode V power rail disabled

The MCDP28x0 has a DisplayPort1.2a dual-mode receiver and HDMI 2.0a transmitter. The upstream main link can receive DP input at HBR2 rate over 4 lanes and AC-coupled TMDS signal up to 340Mchar/s. It supports DP SST stream on its main link and Manchester-coded AUX signaling or native I2C signaling as the side band channel with the DP++ source. The downstream HDMI TX port is HDMI specification compliant.

The MCDP28x0 is capable of supporting Ultra High-Definition video formats, resolutions as high as 4096 x Hz. It supports RGB/YCbCr video color formats with a color depth of 16 bpc or 48 bits per pixel as long as it fits within the DP1.2 and HDMI2.0a link rate. In addition, this device also supports pixel encoding conversion from YCbCr444 to YCbCr420 and YcbCr420 pass-through from a DP input to an HDMI output. High Dynamic Range HDR with deep color up to 12bpc at 4Kp60Hz is supported through the conversion of YCbCr444 CVT timing over DP link with horizontal expansion to YCbCr420 CEA timing on the HDMI TX output.

This device offers secure reception and transmission of high bandwidth digital audio and video content with HDCP 1.x content protection for the upstream DP interface and HDCP2.2 for the downstream HDMI interface. It also operates as an HDCP1.x repeater between the source and the sink. In addition, it conforms to the secure communication protocol specified in the Intel “LSPCON Security Requirements

C28x0-DAT-01p

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MCDP28x0

Architecture Specification” document. The MCDP28x0 comes with embedded HDCP keys that are stored in encrypted form.

The MCDP28x0 uses an external crystal of 27 MHz as a reference clock for its operation and it has a reset input which provides the chip reset during system power up. The device has an on-chip microcontroller with SPI, UART, and I2C interfaces for system level communication and debug. It requires an external SPI flash memory for storing device configuration firmware. The firmware update is done through the DP AUX channel or through UART interface. An 8 Mbit SPI flash memory is recommended for storing the firmware with a backup option as fail-safe during in-system-programming.

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MCDP28x0

Application overview

Two important target applications of MCDP28x0 are
• Mobile PC motherboard application. This is referred as motherboard-down topology and the part number that supports this topology is MCDP2800.
• Accessory application dongle, docking station etc. . This is referred as adaptor topology and the part number for this topology is MCDP2850.

Motherboard-down topology

In a Motherboard-down topology, the MCDP2800 resides next to the source CPU/GPU device on a same PCB with relatively short copper tracks connecting directly to the source. These tracks are typically micro stripes with controlled impedance of 100 In this configuration, the source device is aware of the presence and capabilities of the MCDP2800. The source communicates with MCDP2800 through AUX/DDC interface via I2C-over-AUX or native I2C 3.3V messaging. In this topology, typically the MCDP2800 operates as a re-driving or re-timing analog repeater for AC-coupled TMDS input for speeds below 3.4Gbps and as a DisplayPort to HDMI protocol converter for speeds above Gbps up to Gbps. The analog repeater mode saves the active power consumption during low frequency oeprtation. MCDP2800 however is capable of operating as DP to HDMI protocol converter for the entire operating range up to 6 Gbps. The motherboard-down topology supports transmitting both HDCP1.x and HDCP2.2 protected content over the HDMI output.

Figure MCDP2800 motherboard-down use case
Ordering information

MCDP28x0

Part number MCDP2800-BBES MCDP2800-BB MCDP2800-BBT MCDP2850-BB MCDP2850-BBT MCDP2800-BC MCDP2800-BCT MCDP2850-BC MCDP2850-BCT

Table Order codes

C28x0-DAT-01p

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MCDP28x0

Date 09-Mar-2016 07-Apr-2016

Changes

Initial version. Updated HDMI2.0 to HDMI2.0a throughout the datasheet. Added sub-bullet to Features section.

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MCDP28x0

Notice

Semiconductor products may possibly experience breakdown or malfunction. Adequate care should be taken with respect to the safety design of equipment in order to prevent the occurrence of human injury, fire or social loss in the event of breakdown or malfunction of semiconductor products The overview of operations and illustration of applications described in this document indicate the conceptual method of use of the semiconductor product and do not guarantee operability in equipment in which the product is actually used. The names of companies and trademarks stated in this document are registered trademarks of the relevant companies. MegaChips Co. provides no guarantees nor grants any implementation rights with respect to industrial property rights, intellectual property rights and other such rights belonging to third parties or/and MegaChips Co. in the use of products and of technical information including information on the overview of operations and the circuit diagrams that are described in this document. The product described in this document may possibly be considered goods or technology regulated by the Foreign Currency and Foreign Trade Control Law. In the event such law applies, export license will be required under said law when exporting the product. This regulation shall be valid in Japan domestic. In the event the intention is to use the product described in this document in applications that require an extremely high standard of reliability such as nuclear systems, aerospace equipment or medical equipment for life support, please contact the sales department of MegaChips Co. in advance. All information contained in this document is subject to change without notice. Copyright 2016 MegaChips Corporation All rights reserved

MegaChips Corporation Head Quarters 1-1-1 Miyahara, Yodogawa-ku Osaka 532-0003, Japan TEL +81-6-6399-2884

MegaChips Corporation Tokyo Office 17-6 Ichiban-cho, Chiyoda-ku, Tokyo 102-0082, Japan TEL +81-3-3512-5080

MegaChips Corporation Makuhari Office 1-3 Nakase Mihama-ku Chiba 261-8501, Japan TEL +81-43-296-7414

MegaChips Corporation San Jose Office 2033 Gateway Place, Suite 400, San Jose, CA 95110 U.S.A. TEL +1-408-570-0555

MegaChips Corporation India Branch 17th Floor, Concorde Block UB City, Vittal Mallya Road, Bangalore 560-001, India TEL +91-80-4041-3999

MegaChips Corporation Taiwan Branch RM. B 2F, Worldwide House, No.129, Min Sheng E. Rd., Sec. 3, Taipei 105, Taiwan TEL +886-2-2547-1297

MegaChips Corporation Tainan Office RM. 2, 8F, No.24, Da Qiao 2 Rd., Yong Kang Dist., Tainan 710, Taiwan TEL +886-6-302-2898

MegaChips Corporation Zhunan Office No.118, Chung-Hua Rd., Chu-Nan, Miao-Li 350, Taiwan TEL +886-37-666-156

MegaChips Corporation Shenzhen Office Room 6307, Office Tower, Shun Hing Square, 5002 Shen Nan Dong Road, Luohu District, Shenzhen 518000, P. R. China TEL +86-755-3664-6990

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Datasheet ID: MCDP2850BC 647757