DS3100DK

DS3100DK Datasheet

Part	Datasheet
DS3100DK	DS3100DK (pdf)

PDF Datasheet Preview
The DS3100DK is an easy-to-use demo and evaluation kit for the DS3100 Stratum 3/3E timing card IC. A surface-mounted DS3100 and careful layout provide maximum signal integrity. An on-board Maxim 8051-compatible microcontroller and included software give point-and-click access to configuration and status registers from a personal computer. LEDs on the board indicate interrupt, power-supply function, and GPIO status. The board provides BNC and bantam connectors for the composite clock and BITS interfaces. Single-ended and LVDS clocks are accessed via SMB connectors. All LEDs and connectors are clearly labeled with silkscreening to identify associated signals. DEMO KIT CONTENTS DS3100DK PCB DS3100DK Stratum 3/3E Timing Card IC Demo Kit Soldered DS3100 for Best Signal Integrity SMB Connectors, BNC, Bantam, Transformers, and Termination Ease Connectivity Careful Layout for Analog Signal Paths On-Board Stratum 3 Oscillator with Footprints for Stratum 3E Oscillators DS3100 Configured for CPU Bus Operation for Complete Control Over the Device On-Board Maxim Microcontroller and Included Software Provide Point-and-Click Access to the DS3100 Register Set LEDs for Interrupt, Power Supplies, and GPIO Included International Power Supply Banana Jack VDD and GND Connectors Support Use of Lab Power Supplies Easy-to-Read Silkscreen Labels Identify the Signals Associated with All Connectors, Jumpers, and LEDs Header Provided for Master/Slave Connection to a Second DS3100DK Software Provides GUI Fields for Most Commonly Used Features Plus Full Read/Write Access to the Entire Register Set Software Support for Creating and Running Configuration Scripts Saves Time During Evaluation MINIMUM SYSTEM REQUIREMENTS PC Running XP or Windows 2000 Display with 1024 x 768 Resolution or Higher Available USB Port or Serial COM Port USB Cable or DB-9 Serial Cable ORDERING INFORMATION PART DS3100DK DESCRIPTION Demo kit for DS3100 Windows is a registered trademark of Microsoft Corp. 1 of 38 DS3100DK TABLE OF CONTENTS BOARD INPUT AND OUTPUT JUMPERS, HEADERS, AND SWITCH SETTINGS COMPOSITE CLOCK INTERFACE BITS INTERFACES MICROCONTROLLER POWER-SUPPLY BASIC HARDWARE USB DRIVER INSTALLING AND RUNNING THE COMMAND LINE OPTIONS OVERVIEW OF THE SOFTWARE GLOBAL CONFIGURATION INPUT CLOCK MONITOR, DIVIDER, AND SELECTOR T0 DPLL 10 T4 DPLL 12 T0 13 T4 13 OUTPUT DPLL FREQUENCY LIMITS, PHASE DETECTORS, DPLL LOCK 15 BITS RECEIVERS AND BITS TRANSMITTERS Note About Working with the BITS Receivers and Transmitters 15 COMPOSITE CLOCK RECEIVERS REFCLK CALIBRATION REGISTER VIEW CONFIGURATION SCRIPTS AND LOG FILE Configuration Log File 21 Configuration 21 ADDITIONAL INFORMATION AND RESOURCES DS3100 DS3100DK TECHNICAL SUPPORT APPENDIX 1 HARDWARE APPENDIX 2 BITS MODE WRITE SCHEMATICS 2 of 38 DS3100DK LIST OF FIGURES Figure Board 4 Figure Software Main Screen 8 Figure Software Input Clock Window 9 Figure Software T0 DPLL Window 11 Figure Software T4 DPLL Window 12 Figure Software BITS Receiver Window DS1 Mode 16 Figure Software BITS Receiver Window E1 Mode 16 Figure Software BITS Transmitter Window DS1 Mode and E1 Mode 16 Figure Software CC Receiver 19 Figure Software Register View Window 20 LIST OF TABLES Table Mapping Between Input Clock Software Fields and DS3100 Register Fields 9 Table Mapping Between T0 DPLL Software Fields and DS3100 Register Fields 11 Table Mapping Between T4 DPLL Software Fields and DS3100 Register Fields 13 Table Mapping Between T0 APLL Software Fields and DS3100 Register Fields 13 Table Mapping Between T4 APLL Software Fields and DS3100 Register Fields 13 Table Mapping Between Output Clock Software Fields and DS3100 Register Fields 14 Table Mapping Between DPLL Software Fields and DS3100 Register Fields 15 Table Mapping Between BITS Software Fields and DS3100 Register Fields 17 Table Mapping Between CC Software Fields and DS3100 Register Fields 19 Table Mapping Between REFCLK Software Fields and DS3100 Register Fields 19 3 of 38 DS3100DK BOARD FLOORPLAN Figure 1-1 shows the floorplan of the DS3100DK. The DS3100 is in the center of the board, input clock SMB connectors are along the top edge of the board, and output clock connectors are on the bottom edge. Between the input clock connectors and the DS3100, land patterns are provided for several different types of local oscillators, ranging from tiny, inexpensive TCXOs to larger, high-performance OCXOs. The right edge contains, from top to bottom, power-supply connectors, DC-DC converters and power-indicator LEDs, reset pushbutton, serial connector, and USB connector. An on-board DS87C520 microcontroller is located near the USB connector. The left edge of the board is occupied by connectors and transformers for the DS3100’s built-in BITS DS1/E1/2048kHz and composite clock 64kHz receivers and transmitters. Between the BITS and composite clock connectors are a JTAG header and three switches to control the DS3100’s MASTSLV, SONSDH, and SRCSW pins. See APPENDIX 1 HARDWARE COMPONENTS for a complete component list. Complete board schematics follow Appendix Figure Board Floorplan LVDS Input Clocks Single-ended Input Clocks Oscillator Circuitry Power Option 5V Banana Jack GND Banana Jack Power Supply Circuitry

PDF Datasheet Preview

The DS3100DK is an easy-to-use demo and evaluation kit for the DS3100 Stratum 3/3E timing card IC. A surface-mounted DS3100 and careful layout provide maximum signal integrity. An on-board Maxim 8051-compatible microcontroller and included software give point-and-click access to configuration and status registers from a personal computer. LEDs on the board indicate interrupt, power-supply function, and GPIO status. The board provides BNC and bantam connectors for the composite clock and BITS interfaces. Single-ended and LVDS clocks are accessed via SMB connectors. All LEDs and connectors are clearly labeled with silkscreening to identify associated signals.

DEMO KIT CONTENTS

DS3100DK PCB

DS3100DK Stratum 3/3E Timing Card IC

Demo Kit

Soldered DS3100 for Best Signal Integrity

SMB Connectors, BNC, Bantam, Transformers, and Termination Ease Connectivity

Careful Layout for Analog Signal Paths

On-Board Stratum 3 Oscillator with Footprints for Stratum 3E Oscillators

DS3100 Configured for CPU Bus Operation for Complete Control Over the Device

On-Board Maxim Microcontroller and Included Software Provide Point-and-Click Access to the DS3100 Register Set

LEDs for Interrupt, Power Supplies, and GPIO

Included International Power Supply

Banana Jack VDD and GND Connectors Support Use of Lab Power Supplies

Easy-to-Read Silkscreen Labels Identify the Signals Associated with All Connectors, Jumpers, and LEDs

Header Provided for Master/Slave Connection to a Second DS3100DK

Software Provides GUI Fields for Most Commonly Used Features Plus Full Read/Write Access to the Entire Register Set

Software Support for Creating and Running Configuration Scripts Saves Time During Evaluation

MINIMUM SYSTEM REQUIREMENTS

PC Running XP or Windows 2000 Display with 1024 x 768 Resolution or Higher Available USB Port or Serial COM Port USB Cable or DB-9 Serial Cable
ORDERING INFORMATION

PART DS3100DK

DESCRIPTION Demo kit for DS3100

Windows is a registered trademark of Microsoft Corp.
1 of 38

DS3100DK

TABLE OF CONTENTS

BOARD

INPUT AND OUTPUT JUMPERS, HEADERS, AND SWITCH SETTINGS COMPOSITE CLOCK INTERFACE BITS INTERFACES MICROCONTROLLER POWER-SUPPLY

BASIC HARDWARE

USB DRIVER

INSTALLING AND RUNNING THE

COMMAND LINE OPTIONS

OVERVIEW OF THE SOFTWARE

GLOBAL CONFIGURATION INPUT CLOCK MONITOR, DIVIDER, AND SELECTOR T0 DPLL 10 T4 DPLL 12 T0 13 T4 13 OUTPUT DPLL FREQUENCY LIMITS, PHASE DETECTORS, DPLL LOCK 15 BITS RECEIVERS AND BITS TRANSMITTERS

Note About Working with the BITS Receivers and Transmitters 15 COMPOSITE CLOCK RECEIVERS REFCLK CALIBRATION REGISTER VIEW CONFIGURATION SCRIPTS AND LOG FILE

Configuration Log File 21 Configuration 21

ADDITIONAL INFORMATION AND RESOURCES

DS3100 DS3100DK TECHNICAL SUPPORT

APPENDIX 1 HARDWARE

APPENDIX 2 BITS MODE WRITE

SCHEMATICS
2 of 38

DS3100DK

LIST OF FIGURES

Figure Board 4 Figure Software Main Screen 8 Figure Software Input Clock Window 9 Figure Software T0 DPLL Window 11 Figure Software T4 DPLL Window 12 Figure Software BITS Receiver Window DS1 Mode 16 Figure Software BITS Receiver Window E1 Mode 16 Figure Software BITS Transmitter Window DS1 Mode and E1 Mode 16 Figure Software CC Receiver 19 Figure Software Register View Window 20

LIST OF TABLES

Table Mapping Between Input Clock Software Fields and DS3100 Register Fields 9 Table Mapping Between T0 DPLL Software Fields and DS3100 Register Fields 11 Table Mapping Between T4 DPLL Software Fields and DS3100 Register Fields 13 Table Mapping Between T0 APLL Software Fields and DS3100 Register Fields 13 Table Mapping Between T4 APLL Software Fields and DS3100 Register Fields 13 Table Mapping Between Output Clock Software Fields and DS3100 Register Fields 14 Table Mapping Between DPLL Software Fields and DS3100 Register Fields 15 Table Mapping Between BITS Software Fields and DS3100 Register Fields 17 Table Mapping Between CC Software Fields and DS3100 Register Fields 19 Table Mapping Between REFCLK Software Fields and DS3100 Register Fields 19
3 of 38

DS3100DK

BOARD FLOORPLAN

Figure 1-1 shows the floorplan of the DS3100DK. The DS3100 is in the center of the board, input clock SMB connectors are along the top edge of the board, and output clock connectors are on the bottom edge. Between the input clock connectors and the DS3100, land patterns are provided for several different types of local oscillators, ranging from tiny, inexpensive TCXOs to larger, high-performance OCXOs. The right edge contains, from top to bottom, power-supply connectors, DC-DC converters and power-indicator LEDs, reset pushbutton, serial connector, and USB connector. An on-board DS87C520 microcontroller is located near the USB connector. The left edge of the board is occupied by connectors and transformers for the DS3100’s built-in BITS DS1/E1/2048kHz and composite clock 64kHz receivers and transmitters. Between the BITS and composite clock connectors are a JTAG header and three switches to control the DS3100’s MASTSLV, SONSDH, and SRCSW pins.

See APPENDIX 1 HARDWARE COMPONENTS for a complete component list. Complete board schematics follow Appendix

Figure Board Floorplan

LVDS Input Clocks

Single-ended Input Clocks

Oscillator Circuitry

Power Option
5V Banana Jack

GND Banana Jack

Power Supply Circuitry

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived DS3100DK Datasheet file may be downloaded here without warranties.

Datasheet ID: DS3100DK 647178