71M6543H-IGTR/F

71M6543H-IGTR/F Datasheet

71M6543F/H and 71M6543G/GH Energy Meter ICs

Part	Datasheet
71M6543H-IGTR/F	71M6543H-IGTR/F (pdf)

Related Parts	Information
71M6543H-IGT/F	71M6543H-IGT/F

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A Maxim Integrated Products Brand 71M6543F/H and 71M6543G/GH Energy Meter ICs DATA SHEET April 2011 The 71M6543F, 71M6543H, 71M6543G, and 71M6543GH are Teridian’s 4th-generation polyphase metering systems-on-chips SoCs with a 5MHz 8051-compatible MPU core, low-power realtime clock RTC with digital temperature compensation, flash memory, and LCD driver. Our Single Converter with a 22-bit delta-sigma ADC, seven analog inputs, digital metrology temperature compensation, precision voltage reference, and a 32bit computation engine CE supports a wide range of metering applications with very few external components. The 71M6543F, 71M6543H, 71M6543G and 71M6543GH support optional interfaces to the 71M6xx3 series of isolated sensors that offer BOM cost reduction, immunity to magnetic tamper, and enhanced reliability. The ICs feature ultra-low-power operation in active and battery modes, 5KB shared RAM, and 64KB 71M6543F, 71M6543H or 128KB 71M6543G, 71M6543GH of flash memory, which can be programmed with code and/or data during meter operation. High processing and sampling rates combined with differential inputs offer a powerful metering platform for commercial and industrial meters with up to class accuracy 71M6543H, 71M6543GH . A complete array of code development tools, demonstration code, and reference designs enable rapid development and certification of meters that meet all ANSI and IEC electricity metering standards worldwide. • Accuracy Over 2000:1 Current Range • Exceeds IEC 62053/ANSI C12.20 Standards • Seven Sensor Inputs with Neutral Current Measurement, Differential Mode Selectable for Current Inputs • Selectable Gain of 1 or 8 for One Current Input to Support Shunts • High-Speed Wh/VARh Pulse Outputs with Programmable Width • 64KB Flash, 5KB RAM 71M6543F/H • 128KB Flash, 5KB RAM 71M6543G/GH • Up to Four Pulse Outputs with Pulse Count • Four-Quadrant Metering, Phase Sequencing • Digital Temperature Compensation Metrology Compensation Accurate RTC for TOU Functions with Automatic Temperature Compensation for Crystal in All Power Modes • Independent 32-Bit Compute Engine • 46-64Hz Line Frequency Range with the Same Calibration Shunt Current Sensors C NEUTRAL B LOAD POWER SUPPLY NEUTRAL Note This system is referenced to Neutral 3x TERIDIAN 71M6xx3 Resistor Dividers 71M6xx3 Pulse Transformers AMR IR HOST MUX and ADC IADC0 IADC1 VADC10 VC IADC6 IADC7 VADC9 VB IADC4 IADC5 VADC8 VA IADC2 IADC3 V3P3A V3P3SYS GNDA GNDD TERIDIAN PWR MODE CONTROL 71M6543F/ WAKE-UP Teridian Semiconductor Corporation v1.2 71M6543F/H and 71M6543G/GH Data Sheet Figures Figure 1 IC Functional Block Diagram 9 Figure 2 AFE Block Diagram Shunts One-Local, Three-Remotes 12 Figure AFE Block Diagram Four 13 Figure 4 States in a Multiplexer Frame MUX_DIV[3:0] = 6 17 Figure 5 States in a Multiplexer Frame MUX_DIV[3:0] = 7 17 Figure 6 General Topology of a Chopped 21 Figure 7 CROSS Signal with CHOP_E = 21 Figure 8 RTM Timing 26 Figure Pulse Generator FIFO Timing 28 Figure 10 Samples from Multiplexer Cycle 29 Figure 11 Accumulation 29 Figure 12 Interrupt 46 Figure 13 Automatic Temperature Compensation 54 Figure 14 Optical 58 Figure 15 Optical Interface UART1 58 Figure 16 Connecting an External Load to DIO Pins 60 Figure 17 LCD Waveforms 65 Figure 18 3-wire Interface. Write Command, 67 Figure 19 3-wire Interface. Write Command, 68 Figure 20 3-wire Interface. Read 68 Figure 21 3-Wire Interface. Write Command when 68 Figure 22 3-wire Interface. Write Command when HiZ=1 and 68 Figure 23 SPI Slave Port - Typical Multi-Byte Read and Write 70 Figure 24 Voltage, Current, Momentary and Accumulated 75 Figure 25 Operation Modes State Diagram 76 Figure 26 MPU/CE Data 85 Figure 27 Resistive Voltage Divider Voltage 86 Figure CT with Single-Ended Input Connection Current 86 Figure 29 CT with Differential Input Connection Current Sensing 86 Figure 30 Differential Resistive Shunt Connections Current 86 Figure 31 System Using Three-Remotes and One-Local Neutral Sensor 87 Figure System Using Current Transformers 88 Figure 33 I2C EEPROM 94 Figure 34 Connections for UART0 94 Figure 35 Connection for Optical 95 Figure 36 External Components for the RESET Pin Push-Button Left , Production Circuit Right 96 Figure 37 External Components for the Emulator Interface 96 Figure Trim Fuse Bit Mapping 118 Figure 39 CE Data Flow Multiplexer and 131 Figure 40 CE Data Flow Scaling, Gain Control, Intermediate Variables for one Phase........................ 131 Figure 41 CE Data Flow Squaring and Summation 132 Figure 42 Wh Error from 200 A to A at 60 Hz, 240 VAC ......................Error! Bookmark not defined. Figure 43 VARh Error from 200 A to A at 60 Hz, 240 VAC...................Error! Bookmark not defined. Figure 44 Wh Error from 200 A to A at Various Frequencies 0° Load angle, 240 VAC ............. Error! Bookmark not defined. Figure 45 100-pin LQFP Package 148 Figure 46 Pinout for the LQFP-100 149 Figure 47 I/O Equivalent 154 v1.2 Teridian Semiconductor Corporation 71M6543F/H and 71M6543G/GH Data Sheet Tables Table Required CE Code and Settings for 1-Local / 3-Remotes 15 Table Required CE Code and Settings for CT Sensors 16 Table 3 Multiplexer and ADC Configuration 19 Table RCMD[4:0] Bits 23 Table 5 Remote Interface Read Commands 23 Table 6 I/O RAM Control Bits for Isolated 24 Table 7 Inputs Selected in Multiplexer Cycles 26 Table 8 CKMPU Clock 30 Table 9 Memory 31 Table 10 Internal Data Memory Map 32 Table 11 Special Function Register 32 Table 12 Generic 80515 SFRs - Location and Reset Values 33 Table 13 PSW Bit Functions SFR 0xD0 34 Table 14 Port Registers SEGDIO0-15 35 Table 15 Stretch Memory Cycle Width 35 Table 80515 PCON SFR Register SFR 36 Table 17 Baud Rate 36 Table 18 UART Modes 37 Table 19 The S0CON UART0 Register SFR 0x98 37 Table 20 The S1CON UART1 Register SFR 38 Table 21 PCON Register Bit Description SFR 0x87 38 Table 22 Timers/Counters Mode Description 39 Table 23 Allowed Timer/Counter Mode 39 Table 24 TMOD Register Bit Description SFR 0x89 39 Table 25 The TCON Register Bit Functions SFR 0x88 40 Table 26 The IEN0 Bit Functions SFR 41 Table 27 The IEN1 Bit Functions SFR 41 Table 28 The IEN2 Bit Functions SFR 41 Table 29 TCON Bit Functions SFR 0x88 41 Table 30 The T2CON Bit Functions SFR 0xC8 42 Table 31 The IRCON Bit Functions SFR 0xC0 42 Table 32 External MPU Interrupts 42 Table 33 Interrupt Enable and Flag Bits 43 Table 34 Interrupt Priority Level 43 Table 35 Interrupt Priority Levels 44 Table 36 Interrupt Priority Registers IP0 and 44 Table 37 Interrupt Polling Sequence 45 Table 38 Interrupt Vectors 45 Table 39 Flash Memory Access 47 Table 40 Bank Switching with FL_BANK[1:0] SFR 0xB6[1:0] in the 71M6543G/GH 48 Table 41 Flash Security 49 Table 42 Clock System Summary 51 Table 43 RTC Control Registers 52 Table 44 I/O RAM Registers for RTC Temperature 53 Table 45 NV RAM Table Bookmark not defined. Table 46 I/O RAM Registers for RTC Interrupts 55 Table 47 I/O RAM Registers for Temperature and Battery Measurement 56 Table 48 Selectable Resources using the DIO_Rn[2:0] 59 Teridian Semiconductor Corporation v1.2 71M6543F/H and 71M6543G/GH Data Sheet Table 49 Data/Direction Registers and Internal Resources for SEGDIO0 to SEGDIO15........................ 60 Table 50 Data/Direction Registers for SEGDIO16 to 61 Table 51 Data/Direction Registers for SEGDIO32 to 61 Table 52 Data/Direction Registers for SEGDIO51 to 61 Table 53 LCD_VMODE Configurations 63 Table 54 LCD 64 Table 55 LCD Data Registers for SEGDIO46 to 65 Table 56 EECTRL Bits for 2-pin 66 Table 57 EECTRL Bits for the 3-wire Interface 67 Table 58 SPI Transaction Fields 69 Table 59 SPI Command Sequences 70 Table 60 SPI 70 Table 61 TMUX[4:0] Selections 73 Table 62 TMUX2[4:0] 74 Table 63 Available Circuit Functions 77 Table 64 VSTAT[2:0] SFR 0xF9[2:0] 80 Table 65 Wake Enable and Flag Bits 82 Table 66 Wake Bits 83 Table 67 Clear Events for WAKE 84 Table 68 GAIN_ADJn Compensation Channels Figure 2, Figure 31, Table 1 91 Table 69 GAIN_ADJx Compensation Channels Figure 3, Figure 32, Table 2 93 Table 70 I/O RAM Map Functional Order, Basic Configuration 98 Table 71 I/O RAM Map Functional Order 100 Table 72 I/O RAM Map Alphabetical Order 104 Table 73 Info Page Trim 118 Table 74 CE EQU[2:0] Equations and Element Input Mapping 121 Table 75 CE Raw Data Access Locations 122 Table 76 CESTATUS 123 Table 77 CESTATUS Bit 123 Table 78 CECONFIG 123 Table 79 CECONFIG Bit Definitions CE RAM 0x20 124 Table 80 Sag Threshold, Phase Measurement, and Gain Adjust 125 Table 81 CE Transfer Variables with 125 Table 100 Low-Power Voltage Regulator Performance 140 Table 101 Crystal Oscillator Performance 140 Table 102 PLL Performance 140 Table 103 LCD Drivers Performance Specifications 140 Table 105 71M6543 VREF Performance Specifications 143 Table 106 ADC Converter Performance Specifications 144 Table 107 Pre-Amplifier Performance 145 Table 108 Flash Memory Timing Specifications 146 Table SPI Slave Timing Specifications 146 Table 110 EEPROM Interface Timing 146 Table 111 RESET Pin Timing 147 Table 112 RTC Range for 147 Table 113 71M6543 Power and Ground 150 Table 114 71M6543 Analog Pins 151 Table 115 71M6543 Digital Pins 152 Table 71M6543 Ordering Guide 155 Teridian Semiconductor Corporation v1.2 71M6543F/H and 71M6543G/GH Data Sheet IADC0 IADC1 IADC2 IADC3 IADC4 IADC5 IADC6 IADC7 VADC8 VA VADC9 VB VADC10 VC XIN XOUT TEST RX TX OPT_RX/ SEGDIO55 OPT_TX/ SEGDIO51/ WPULSE/ VPULSE VREF V3P3A GNDA GNDD VLCD V3P3SYS AD CONVERTER MUX and PREAMP VBIAS VBIAS V3P3A VREF VREF VLCD Voltage Boost V3P3D VBAT MUX CTRL CROSS Voltage Regulator CK32 Oscillator RTCLK 32KHz MCK PLL CK32 32KHz DIV ADC 32 KHz MHZ CKADC CKFIR 22 2.5V to logic CLOCK GEN CK_4X LCD_GEN TEST MODE UART0 CKMPU_2x CE MUX_SYNC STRT WPULSE MPU RAM 5 KB 7 Ordering Information 71M6543 Ordering Guide Refer to the 71M6xxx data sheet for the 71M6xx3 ordering guide information. Table 71M6543 Ordering Guide Part Part Description Package, Accuracy Flash Size KB Packaging Order Number Package Marking 71M6543F 100-pin LQFP Lead Pb -Free, bulk 71M6543F-IGT/F 71M6543F-IGT 71M6543F 100-pin LQFP Lead Pb -Free, 64 tape and reel 71M6543F-IGTR/F 71M6543F-IGT 71M6543H* 100-pin LQFP Lead Pb -Free, bulk 71M6543H-IGT/F 71M6543H-IGT 71M6543H* 100-pin LQFP Lead Pb -Free, 64 tape and reel 71M6543H-IGTR/F 71M6543H-IGT 71M6543G 100-pin LQFP Lead Pb -Free, bulk 71M6543G-IGT/F 71M6543G-IGT 71M6543G 100-pin LQFP Lead Pb -Free, 128 tape and reel 71M6543G-IGTR/F 71M6543G-IGT 71M6543GH* 100-pin LQFP Lead Pb -Free, bulk 71M6543GH-IGT/F 71M6543GH-IGT 71M6543GH* 100-pin LQFP Lead Pb -Free, 128 tape and reel 71M6543GH-IGTR/F 71M6543GH-IGT See Distinction Between Standard and High-Precision Parts page *Future factory for availability. 8 Related Information The following documents related to the 71M6543 and 71M6xx3 are available from Teridian Semiconductor Corporation: • 71M6543F/H and 71M6543G/GH Data Sheet this document • 71M6xxx Data Sheet • 71M654x Software User’s Guide SUG • 71M6543 Demo Board User’s Manual DBUM 9 Contact Information For technical support or more information about Maxim products, contact technical support at

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A Maxim Integrated Products Brand
71M6543F/H and 71M6543G/GH Energy Meter ICs

DATA SHEET

April 2011

The 71M6543F, 71M6543H, 71M6543G, and 71M6543GH are Teridian’s 4th-generation polyphase metering systems-on-chips SoCs with a 5MHz 8051-compatible MPU core, low-power realtime clock RTC with digital temperature compensation, flash memory, and LCD driver. Our Single Converter with a 22-bit delta-sigma ADC, seven analog inputs, digital metrology temperature compensation, precision voltage reference, and a 32bit computation engine CE supports a wide range of metering applications with very few external components.

The 71M6543F, 71M6543H, 71M6543G and 71M6543GH support optional interfaces to the 71M6xx3 series of isolated sensors that offer BOM cost reduction, immunity to magnetic tamper, and enhanced reliability. The ICs feature ultra-low-power operation in active and battery modes, 5KB shared RAM, and 64KB 71M6543F, 71M6543H or 128KB 71M6543G, 71M6543GH of flash memory, which can be programmed with code and/or data during meter operation. High processing and sampling rates combined with differential inputs offer a powerful metering platform for commercial and industrial meters with up to class accuracy 71M6543H, 71M6543GH .

A complete array of code development tools, demonstration code, and reference designs enable rapid development and certification of meters that meet all ANSI and IEC electricity metering standards worldwide.
• Accuracy Over 2000:1 Current Range
• Exceeds IEC 62053/ANSI C12.20 Standards
• Seven Sensor Inputs with Neutral Current

Measurement, Differential Mode Selectable for Current Inputs
• Selectable Gain of 1 or 8 for One Current Input to Support Shunts
• High-Speed Wh/VARh Pulse Outputs with Programmable Width
• 64KB Flash, 5KB RAM 71M6543F/H
• 128KB Flash, 5KB RAM 71M6543G/GH
• Up to Four Pulse Outputs with Pulse Count
• Four-Quadrant Metering, Phase Sequencing
• Digital Temperature Compensation Metrology Compensation

Accurate RTC for TOU Functions with Automatic Temperature Compensation for Crystal in All Power Modes
• Independent 32-Bit Compute Engine
• 46-64Hz Line Frequency Range with the Same Calibration

Shunt Current Sensors C NEUTRAL B

LOAD

POWER SUPPLY

NEUTRAL

Note This system is referenced to Neutral 3x TERIDIAN
71M6xx3

Resistor Dividers 71M6xx3

Pulse Transformers

AMR IR

HOST

MUX and ADC

IADC0 IADC1

VADC10 VC

IADC6 IADC7

VADC9 VB

IADC4 IADC5

VADC8 VA

IADC2 IADC3

V3P3A V3P3SYS GNDA GNDD

TERIDIAN

PWR MODE CONTROL
71M6543F/ WAKE-UP
Teridian Semiconductor Corporation
v1.2
71M6543F/H and 71M6543G/GH Data Sheet

Figures

Figure 1 IC Functional Block Diagram 9 Figure 2 AFE Block Diagram Shunts One-Local, Three-Remotes 12 Figure AFE Block Diagram Four 13 Figure 4 States in a Multiplexer Frame MUX_DIV[3:0] = 6 17 Figure 5 States in a Multiplexer Frame MUX_DIV[3:0] = 7 17 Figure 6 General Topology of a Chopped 21 Figure 7 CROSS Signal with CHOP_E = 21 Figure 8 RTM Timing 26 Figure Pulse Generator FIFO Timing 28 Figure 10 Samples from Multiplexer Cycle 29 Figure 11 Accumulation 29 Figure 12 Interrupt 46 Figure 13 Automatic Temperature Compensation 54 Figure 14 Optical 58 Figure 15 Optical Interface UART1 58 Figure 16 Connecting an External Load to DIO Pins 60 Figure 17 LCD Waveforms 65 Figure 18 3-wire Interface. Write Command, 67 Figure 19 3-wire Interface. Write Command, 68 Figure 20 3-wire Interface. Read 68 Figure 21 3-Wire Interface. Write Command when 68 Figure 22 3-wire Interface. Write Command when HiZ=1 and 68 Figure 23 SPI Slave Port - Typical Multi-Byte Read and Write 70 Figure 24 Voltage, Current, Momentary and Accumulated 75 Figure 25 Operation Modes State Diagram 76 Figure 26 MPU/CE Data 85 Figure 27 Resistive Voltage Divider Voltage 86 Figure CT with Single-Ended Input Connection Current 86 Figure 29 CT with Differential Input Connection Current Sensing 86 Figure 30 Differential Resistive Shunt Connections Current 86 Figure 31 System Using Three-Remotes and One-Local Neutral Sensor 87 Figure System Using Current Transformers 88

Figure 33 I2C EEPROM 94 Figure 34 Connections for UART0 94 Figure 35 Connection for Optical 95 Figure 36 External Components for the RESET Pin Push-Button Left , Production Circuit Right 96 Figure 37 External Components for the Emulator Interface 96 Figure Trim Fuse Bit Mapping 118 Figure 39 CE Data Flow Multiplexer and 131 Figure 40 CE Data Flow Scaling, Gain Control, Intermediate Variables for one Phase........................ 131 Figure 41 CE Data Flow Squaring and Summation 132 Figure 42 Wh Error from 200 A to A at 60 Hz, 240 VAC ......................Error! Bookmark not defined. Figure 43 VARh Error from 200 A to A at 60 Hz, 240 VAC...................Error! Bookmark not defined. Figure 44 Wh Error from 200 A to A at Various Frequencies 0° Load angle, 240 VAC ............. Error!

Bookmark not defined. Figure 45 100-pin LQFP Package 148 Figure 46 Pinout for the LQFP-100 149 Figure 47 I/O Equivalent 154
v1.2

Teridian Semiconductor Corporation
71M6543F/H and 71M6543G/GH Data Sheet

Tables

Table Required CE Code and Settings for 1-Local / 3-Remotes 15 Table Required CE Code and Settings for CT Sensors 16 Table 3 Multiplexer and ADC Configuration 19 Table RCMD[4:0] Bits 23 Table 5 Remote Interface Read Commands 23 Table 6 I/O RAM Control Bits for Isolated 24 Table 7 Inputs Selected in Multiplexer Cycles 26 Table 8 CKMPU Clock 30 Table 9 Memory 31 Table 10 Internal Data Memory Map 32 Table 11 Special Function Register 32 Table 12 Generic 80515 SFRs - Location and Reset Values 33 Table 13 PSW Bit Functions SFR 0xD0 34 Table 14 Port Registers SEGDIO0-15 35 Table 15 Stretch Memory Cycle Width 35 Table 80515 PCON SFR Register SFR 36 Table 17 Baud Rate 36 Table 18 UART Modes 37 Table 19 The S0CON UART0 Register SFR 0x98 37 Table 20 The S1CON UART1 Register SFR 38 Table 21 PCON Register Bit Description SFR 0x87 38 Table 22 Timers/Counters Mode Description 39 Table 23 Allowed Timer/Counter Mode 39 Table 24 TMOD Register Bit Description SFR 0x89 39 Table 25 The TCON Register Bit Functions SFR 0x88 40 Table 26 The IEN0 Bit Functions SFR 41 Table 27 The IEN1 Bit Functions SFR 41 Table 28 The IEN2 Bit Functions SFR 41 Table 29 TCON Bit Functions SFR 0x88 41 Table 30 The T2CON Bit Functions SFR 0xC8 42 Table 31 The IRCON Bit Functions SFR 0xC0 42 Table 32 External MPU Interrupts 42

Table 33 Interrupt Enable and Flag Bits 43 Table 34 Interrupt Priority Level 43 Table 35 Interrupt Priority Levels 44 Table 36 Interrupt Priority Registers IP0 and 44 Table 37 Interrupt Polling Sequence 45 Table 38 Interrupt Vectors 45 Table 39 Flash Memory Access 47 Table 40 Bank Switching with FL_BANK[1:0] SFR 0xB6[1:0] in the 71M6543G/GH 48 Table 41 Flash Security 49 Table 42 Clock System Summary 51 Table 43 RTC Control Registers 52 Table 44 I/O RAM Registers for RTC Temperature 53 Table 45 NV RAM Table Bookmark not defined. Table 46 I/O RAM Registers for RTC Interrupts 55 Table 47 I/O RAM Registers for Temperature and Battery Measurement 56 Table 48 Selectable Resources using the DIO_Rn[2:0] 59

Teridian Semiconductor Corporation
v1.2
71M6543F/H and 71M6543G/GH Data Sheet

Table 49 Data/Direction Registers and Internal Resources for SEGDIO0 to SEGDIO15........................ 60

Table 50 Data/Direction Registers for SEGDIO16 to 61

Table 51 Data/Direction Registers for SEGDIO32 to 61

Table 52 Data/Direction Registers for SEGDIO51 to 61 Table 53 LCD_VMODE Configurations 63

Table 54 LCD 64

Table 55 LCD Data Registers for SEGDIO46 to 65 Table 56 EECTRL Bits for 2-pin 66 Table 57 EECTRL Bits for the 3-wire Interface 67

Table 58 SPI Transaction Fields 69

Table 59 SPI Command Sequences 70

Table 60 SPI 70

Table 61 TMUX[4:0] Selections 73 Table 62 TMUX2[4:0] 74

Table 63 Available Circuit Functions 77

Table 64 VSTAT[2:0] SFR 0xF9[2:0] 80

Table 65 Wake Enable and Flag Bits 82

Table 66 Wake Bits 83

Table 67 Clear Events for WAKE 84

Table 68 GAIN_ADJn Compensation Channels Figure 2, Figure 31, Table 1 91

Table 69 GAIN_ADJx Compensation Channels Figure 3, Figure 32, Table 2 93

Table 70 I/O RAM Map Functional Order, Basic Configuration 98

Table 71 I/O RAM Map Functional Order 100

Table 72 I/O RAM Map Alphabetical Order 104

Table 73 Info Page Trim 118 Table 74 CE EQU[2:0] Equations and Element Input Mapping 121

Table 75 CE Raw Data Access Locations 122 Table 76 CESTATUS 123 Table 77 CESTATUS Bit 123

Table 78 CECONFIG 123 Table 79 CECONFIG Bit Definitions CE RAM 0x20 124

Table 80 Sag Threshold, Phase Measurement, and Gain Adjust 125

Table 81 CE Transfer Variables with 125
Table 100 Low-Power Voltage Regulator Performance 140 Table 101 Crystal Oscillator Performance 140 Table 102 PLL Performance 140 Table 103 LCD Drivers Performance Specifications 140 Table 105 71M6543 VREF Performance Specifications 143 Table 106 ADC Converter Performance Specifications 144 Table 107 Pre-Amplifier Performance 145 Table 108 Flash Memory Timing Specifications 146 Table SPI Slave Timing Specifications 146 Table 110 EEPROM Interface Timing 146 Table 111 RESET Pin Timing 147 Table 112 RTC Range for 147 Table 113 71M6543 Power and Ground 150 Table 114 71M6543 Analog Pins 151 Table 115 71M6543 Digital Pins 152 Table 71M6543 Ordering Guide 155

Teridian Semiconductor Corporation
v1.2
71M6543F/H and 71M6543G/GH Data Sheet

IADC0 IADC1 IADC2 IADC3 IADC4 IADC5 IADC6 IADC7 VADC8 VA VADC9 VB VADC10 VC

XIN XOUT

TEST

RX TX OPT_RX/ SEGDIO55 OPT_TX/ SEGDIO51/ WPULSE/ VPULSE

VREF

V3P3A GNDA GNDD VLCD V3P3SYS

AD CONVERTER

MUX and PREAMP

VBIAS

VBIAS

V3P3A

VREF

VREF

VLCD Voltage Boost

V3P3D VBAT

MUX CTRL

CROSS

Voltage Regulator

CK32

Oscillator

RTCLK 32KHz

MCK PLL

CK32 32KHz

DIV ADC
32 KHz

MHZ CKADC

CKFIR 22
2.5V to logic

CLOCK GEN

CK_4X

LCD_GEN

TEST MODE

UART0

CKMPU_2x CE

MUX_SYNC STRT

WPULSE

MPU RAM 5 KB
7 Ordering Information
71M6543 Ordering Guide
Refer to the 71M6xxx data sheet for the 71M6xx3 ordering guide information.
Table 71M6543 Ordering Guide

Part

Part Description Package, Accuracy

Flash Size KB

Packaging

Order Number Package Marking
71M6543F
100-pin LQFP Lead Pb -Free,
bulk
71M6543F-IGT/F 71M6543F-IGT
71M6543F
100-pin LQFP Lead Pb -Free,
64 tape and reel 71M6543F-IGTR/F 71M6543F-IGT
71M6543H*
100-pin LQFP Lead Pb -Free,
bulk
71M6543H-IGT/F 71M6543H-IGT
71M6543H*
100-pin LQFP Lead Pb -Free,
64 tape and reel 71M6543H-IGTR/F 71M6543H-IGT
71M6543G
100-pin LQFP Lead Pb -Free,
bulk
71M6543G-IGT/F 71M6543G-IGT
71M6543G
100-pin LQFP Lead Pb -Free,
128 tape and reel 71M6543G-IGTR/F 71M6543G-IGT
71M6543GH*
100-pin LQFP Lead Pb -Free,
bulk
71M6543GH-IGT/F 71M6543GH-IGT
71M6543GH*
100-pin LQFP Lead Pb -Free,
128 tape and reel 71M6543GH-IGTR/F 71M6543GH-IGT

See Distinction Between Standard and High-Precision Parts page
*Future factory for availability.
8 Related Information

The following documents related to the 71M6543 and 71M6xx3 are available from Teridian Semiconductor Corporation:
• 71M6543F/H and 71M6543G/GH Data Sheet this document
• 71M6xxx Data Sheet
• 71M654x Software User’s Guide SUG
• 71M6543 Demo Board User’s Manual DBUM
9 Contact Information

For technical support or more information about Maxim products, contact technical support at

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived 71M6543H-IGTR/F Datasheet file may be downloaded here without warranties.

Datasheet ID: 71M6543H-IGTR/F 647137