DS1543-70

DS1543-70 Datasheet


DS1543-XXX

Part Datasheet
DS1543-70 DS1543-70 DS1543-70 (pdf)
Related Parts Information
DS1543W-120 DS1543W-120 DS1543W-120
PDF Datasheet Preview
Integrated NV SRAM, real time clock, crystal, power-fail control circuit and lithium energy source Clock registers are accessed identical to the static RAM. These registers are resident in the sixteen top RAM locations Totally nonvolatile with over 10 years of operation in the absence of power Precision Power-On Reset Programmable Watchdog Timer and RTC Alarm BCD coded year, month, date, day, hours, minutes, and seconds with automatic leap year compensation valid up to the year 2100 Battery voltage level indicator flag Power-fail write protection allows for ±10% Vcc power supply tolerance Lithium energy source is electrically disconnected to retain freshness until power is applied for the first time
ORDERING INFORMATION

DS1543-XXX
-70 ns access
-100 ns access
*DS1543W-XXX
3.3V -120 ns access -150 ns access

DS1543 64k NV Timekeeping RAM

PIN ASSIGNMENT

RST 1 A12 2

A7 3 A6 4 A5 5 A4 6 A3 7 A2 8 A1 9 A0 10 DQ0 11 DQ1 12 DQ2 13 GND 14
28 VCC 27 WE 26 IRQ/FT 25 A8 24 A9 23 A11 22 OE 21 A10 20 CE 19 DQ7 18 DQ6 17 DQ5 16 DQ4 15 DQ3
28-Pin Encapsulated Package 700 Mil Extended

PIN DESCRIPTION

A0-A12
- Address Input

DQ0-DQ7 - Data Input/Outputs
- Interrupt, Frequency Test Output Open-Drain
- Power-On Reset Output

Open-Drain
- Chip Enable
- Output Enable

VCC GND NC
- Write Enable - Power Supply Input - Ground - No Connection
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081000

DS1543

The DS1543 is a full-function real-time clock/calendar RTC with a RTC alarm, watchdog timer, poweron reset, battery monitor, and 8k x 8 non-volatile static RAM. User access to all registers within the DS1543 is accomplished with a bytewide interface as shown in Figure The RTC registers contain year, month, date, day, hours, minutes, and seconds data in 24-hour BCD format. Corrections for day of month and leap year are made automatically.

The RTC registers are double-buffered into an internal and external set. The user has direct access to the external set. Clock/calendar updates to the external set of registers can be disabled and enabled to allow the user to access static data. Assuming the internal oscillator is turned on, the internal set of registers are continuously updated this occurs regardless of external registers settings to guarantee that accurate RTC information is always maintained.

The DS1543 has interrupt IRQ /FT and reset RST outputs which can be used to control CPU activity. The IRQ /FT interrupt output can be used to generate an external interrupt when the RTC register values match user programmed alarm values. The interrupt is always available while the device is powered from the system supply and can be programmed to occur when in the battery backed state to serve as a system wake-up. Either the IRQ /FT or RST outputs can also be used as a CPU watchdog timer, CPU activity is monitored and an interrupt or reset output will be activated if the correct activity is not detected within programmed limits. The DS1543 power-on reset can be used to detect a system power down or failure and hold the CPU in a safe reset state until normal power returns and stabilizes the RST output is used for this function.

The DS1543 also contains its own power fail circuitry which automatically deselects the device when the VCC supply enters an out of tolerance condition. This feature provides a high degree of data security during unpredictable system operation brought on by low VCC levels.

PACKAGES
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DS1543 BLOCK DIAGRAM Figure 1

DS1543

DS1543 OPERATING MODES Table 1

In Tolerance

VBAT < VCC < Tolerance <VBAT

CE OE WE DQ0-DQ7

VIH X HIGH-Z

VIL X VIL

VIL VIH
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Datasheet ID: DS1543-70 508384