MX25V8035ZNI-15G

MX25V8035ZNI-15G Datasheet

MX25V4035 MX25V8035

Part	Datasheet
MX25V8035ZNI-15G	MX25V8035ZNI-15G (pdf)

Related Parts	Information
MX25V8035MI-15G	MX25V8035MI-15G

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MX25V4035 MX25V8035 MX25V4035/MX25V8035 DATASHEET P/N PM1468 MX25V4035 MX25V8035 Contents 5 GENERAL 7 Table Additional Feature 7 PIN CONFIGURATIONS 8 PIN 8 BLOCK 9 DATA 10 Table Protected Area 11 Table 512-bit Secured OTP 11 Memory 12 Table Memory Organization 12 Table Memory Organization 13 DEVICE 14 Figure Serial Modes 14 HOLD 15 Figure Hold Condition 15 COMMAND 16 Table Command 16 1 Write Enable 18 2 Write Disable 18 3 Read Identification 18 4 Read Status Register 19 5 Write Status Register 20 Table Protection 20 6 Read Data Bytes 21 7 Read Data Bytes at Higher Speed 21 8 2 x I/O Read Mode 21 9 4 x I/O Read Mode 22 10 Sector Erase 22 11 Block Erase 23 12 Block Erase 23 13 Chip Erase 23 14 Page Program 24 15 4 x I/O Page Program 24 16 Continuously program mode CP 24 17 Deep Power-down 25 18 Release from Deep Power-down RDP , Read Electronic Signature 25 P/N PM1468 MX25V4035 MX25V8035 19 Read Electronic Manufacturer ID & Device ID REMS , REMS2 , 26 Table ID Definitions 26 20 Enter Secured OTP 27 21 Exit Secured OTP 27 22 Read Security Register 27 Table Security Register 28 23 Write Security Register 28 24 HOLD# pin function enable 28 POWER-ON 29 ELECTRICAL 30 ABSOLUTE MAXIMUM 30 Figure 3.Maximum Negative Overshoot 30 CAPACITANCE TA = 25°C, f = 30 Figure Maximum Positive Overshoot 30 Figure INPUT TEST WAVEFORMS AND MEASUREMENT 31 Figure OUTPUT 31 Table DC CHARACTERISTICS Temperature = -40°C to 85°C, VCC = 2.25V ~ 2.75V 32 Table AC CHARACTERISTICS Temperature = -40°C to 85°C, VCC = 2.25V ~ 2.75V .......................... 33 Timing 35 Figure Serial Input 35 Figure Output 35 Figure Hold 36 Figure WP# Setup Timing and Hold Timing during WRSR when 36 Figure Hardware Reset 37 Figure Write Enable WREN Sequence Command 37 Figure Write Disable WRDI Sequence Command 37 Figure Read Identification RDID Sequence Command 38 Figure Read Status Register RDSR Sequence Command 38 Figure Write Status Register WRSR Sequence Command 38 Figure Read Data Bytes READ Sequence Command 39 Figure Read at Higher Speed FAST_READ Sequence Command 39 Figure 2 x I/O Read Mode Sequence Command 40 Figure 4 x I/O Read Mode Sequence Command 40 Figure 4 x I/O Read enhance performance Mode Sequence Command 41 Figure Page Program PP Sequence Command 42 Figure 4 x I/O Page Program 4PP Sequence Command 42 Figure Continuously Program CP Mode Sequence with Hardware Detection Command AD ................ 43 Figure Sector Erase SE Sequence Command 43 Figure Block Erase 32KB BE32K Sequence Command 44 Figure Block Erase BE Sequence Command 44 P/N PM1468 MX25V4035 MX25V8035 P/N PM1468 MX25V4035 MX25V8035 4M-BIT [x 1/x 2/x 4] 2.5V CMOS SERIAL FLASH 8M-BIT [x 1/x 2/x 4] 2.5V CMOS SERIAL FLASH GENERAL • Serial Peripheral Interface compatible -- Mode 0 and Mode 3 • 4M 4,194,304 x 1 bit structure or 2,097,152 x 2 bits two I/O read mode structure or 1,048,576 x 4 bits four I/ O read mode structure 8M 8,388,608 x 1 bit structure or 4,194,304 x 2 bits two I/O read mode structure or 2,097,152 x 4 bits four I/ O read mode structure • Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually • Single Power Supply Operation - to volt for read, erase, and program operations • Latch-up protected to 100mA from -1V to Vcc +1V PERFORMANCE • High Performance - Fast read - 1 I/O 66MHz with 8 dummy cycles - 2 I/O 50MHz with 4 dummy cycles, equivalent to 100MHz - 4 I/O 50MHz with 6 dummy cycles, equivalent to 200MHz - Fast program time 1.7ms typ. and 6ms max. /page 256-byte per page - Byte program time 15us typical - Continuously program mode automatically increase address under word program mode - Fast erase time 80ms typ. /sector 4K-byte per sector 0.6s typ. /block 32K-byte per block 1s typ. /block 64K-byte per block 7.5s typ. /chip for 4M 13s typ. /chip for 8M • Low Power Consumption - Low active read current 12mA max. at 66MHz, 6mA max. at 40MHz - Low active erase/programming current 15mA typ. - Low standby current 7uA max. • Deep Power Down 7uA max. • Minimum 100,000 erase/program cycles • 20 years data retention SOFTWARE FEATURES • Input Data Format - 1-byte Command code • Advanced Security Features - Block lock protection The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instructions - Additional 512-bit secured OTP for unique identifier • Auto Erase and Auto Program Algorithm - Automatically erases and verifies data at selected sector or block - Automatically programs and verifies data at selected page by an internal algorithm that automatically times the program pulse widths Any page to be programed should have page in the erased state first • Status Register Feature • Electronic Identification - JEDEC 1-byte manufacturer ID and 2-byte device ID P/N PM1468 MX25V4035 MX25V8035 - RES command for 1-byte Device ID - Both REMS,REMS2 and REMS4 commands for 1-byte manufacturer ID and 1-byte device ID HARDWARE FEATURES • SCLK Input - Serial clock input • SI/SIO0 - Serial Data Input or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode • SO/SIO1 - Serial Data Output or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode • WP#/SIO2 - Hardware write protection or serial data Input/Output for 4 x I/O read mode • RESET#/HOLD#/SIO3 - Hardware Reset/HOLD/Serial input & Output for 4 x I/O read mode, the pin defaults to be RESET# • PACKAGE - 8-land WSON 6x5mm - 8-pin SOP 150mil - All Pb-free devices are RoHS Compliant P/N PM1468 MX25V4035 MX25V8035 The MX25V4035 are 4,194,304 bit serial Flash memory, which is configured as 524,288 x 8 internally. When it is in two or four I/O read mode, the structure becomes 2,097,152 bits x 2 or 1,048,576 bits x The MX25V8035 are 8,388,608 bit serial Flash memory, which is configured as 1,048,576 x 8 internally. When it is in two or four I/O read mode, the structure becomes 4,194,304 bits x 2 or 2,097,152 bits x The MX25V4035/MX25V8035 feature a serial peripheral interface and software protocol allowing operation on a simple 4-wire bus while it is in single I/O mode. The four bus signals are a clock input SCLK , a serial data input SI , a serial data output SO and a chip select CS# . Serial access to the device is enabled by CS# input. When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# pin and RESET#/HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output. The MX25V4035/MX25V8035 provides sequential read operation on whole chip. After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page 256 bytes basis, or word basis for Continuously program mode, and erase command is executes on sector 4K-byte , block 32K-byte , or block 64K-byte , or whole chip basis. To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit. Advanced security features enhance the protection and security functions, please see security features section for more details. When the device is not in operation and CS# is high, it is put in standby mode and draws less than 7uA DC current. The MX25V4035/MX25V8035 utilizes MXIC's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles. Table Additional Feature Comparison ORDERING INFORMATION PART NO. MX25V4035MI-15G CLOCK MHz OPERATING CURRENT MAX. mA MX25V8035MI-15G MX25V4035ZNI-15G MX25V8035ZNI-15G STANDBY CURRENT MAX. uA TEMPERATURE PACKAGE -40°C~85°C -40°C~85°C -40°C~85°C -40°C~85°C 8-SOP 150mil 8-SOP 150mil 8-WSON 6x5mm 8-WSON 6x5mm Remark Pb-free Pb-free Pb-free Pb-free P/N PM1468 MX25V4035 MX25V8035 PART NAME DESCRIPTION MX 25 V 4035 M I OPTION G Pb-free SPEED 15 66MHz TEMPERATURE RANGE I Industrial -40°C to 85°C PACKAGE M 150mil 8-SOP ZN WSON DENSITY & MODE 4035 4Mb 8035 8Mb TYPE V 2.5V DEVICE 25 Serial Flash P/N PM1468 PACKAGE INFORMATION MX25V4035 MX25V8035 P/N PM1468 MX25V4035 MX25V8035 P/N PM1468 MX25V4035 MX25V8035 Removed "Preliminary" title Corrected error P32,49 Removed note 4 from Erase and Programming Performance table P49 Modified General Description as 4-wire bus and added CS# Date JUL/30/2009 DEC/18/3009 JUL/23/2010 P/N PM1468 MX25V4035 MX25V8035 Macronix's products are not designed, manufactured, or intended for use for any high risk applications in which the failure of a single component could cause death, personal injury, severe physical damage, or other substantial harm to persons or property, such as life-support systems, high temperature automotive, medical, aircraft and military application. Macronix and its suppliers will not be liable to you and/or any third party for any claims, injuries or damages that may be incurred due to use of Macronix's products in the prohibited applications. Copyright Macronix International Co., Ltd. All Rights Reserved. Macronix, MXIC, MXIC Logo, MX Logo, MXSMIO, are trademarks or registered trademarks of Macronix International Co., Ltd. The names and brands of other companies are for identification purposes only and may be claimed as the property of the respective companies. For the contact and order information, please visit Macronix’s Web site at: MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 55

PDF Datasheet Preview

MX25V4035 MX25V8035

MX25V4035/MX25V8035 DATASHEET

P/N PM1468

MX25V4035 MX25V8035

Contents
5 GENERAL 7

Table Additional Feature 7 PIN CONFIGURATIONS 8 PIN 8 BLOCK 9 DATA 10

Table Protected Area 11 Table 512-bit Secured OTP 11 Memory 12 Table Memory Organization 12 Table Memory Organization 13 DEVICE 14 Figure Serial Modes 14 HOLD 15 Figure Hold Condition 15 COMMAND 16 Table Command 16 1 Write Enable 18 2 Write Disable 18 3 Read Identification 18 4 Read Status Register 19 5 Write Status Register 20 Table Protection 20 6 Read Data Bytes 21 7 Read Data Bytes at Higher Speed 21 8 2 x I/O Read Mode 21 9 4 x I/O Read Mode 22 10 Sector Erase 22 11 Block Erase 23 12 Block Erase 23 13 Chip Erase 23 14 Page Program 24 15 4 x I/O Page Program 24 16 Continuously program mode CP 24 17 Deep Power-down 25 18 Release from Deep Power-down RDP , Read Electronic Signature 25

P/N PM1468

MX25V4035 MX25V8035
19 Read Electronic Manufacturer ID & Device ID REMS , REMS2 , 26 Table ID Definitions 26 20 Enter Secured OTP 27 21 Exit Secured OTP 27 22 Read Security Register 27 Table Security Register 28 23 Write Security Register 28 24 HOLD# pin function enable 28 POWER-ON 29 ELECTRICAL 30 ABSOLUTE MAXIMUM 30 Figure 3.Maximum Negative Overshoot 30 CAPACITANCE TA = 25°C, f = 30 Figure Maximum Positive Overshoot 30 Figure INPUT TEST WAVEFORMS AND MEASUREMENT 31 Figure OUTPUT 31 Table DC CHARACTERISTICS Temperature = -40°C to 85°C, VCC = 2.25V ~ 2.75V 32 Table AC CHARACTERISTICS Temperature = -40°C to 85°C, VCC = 2.25V ~ 2.75V .......................... 33 Timing 35 Figure Serial Input 35 Figure Output 35 Figure Hold 36 Figure WP# Setup Timing and Hold Timing during WRSR when 36 Figure Hardware Reset 37 Figure Write Enable WREN Sequence Command 37 Figure Write Disable WRDI Sequence Command 37 Figure Read Identification RDID Sequence Command 38 Figure Read Status Register RDSR Sequence Command 38 Figure Write Status Register WRSR Sequence Command 38 Figure Read Data Bytes READ Sequence Command 39 Figure Read at Higher Speed FAST_READ Sequence Command 39 Figure 2 x I/O Read Mode Sequence Command 40 Figure 4 x I/O Read Mode Sequence Command 40 Figure 4 x I/O Read enhance performance Mode Sequence Command 41 Figure Page Program PP Sequence Command 42 Figure 4 x I/O Page Program 4PP Sequence Command 42 Figure Continuously Program CP Mode Sequence with Hardware Detection Command AD ................ 43 Figure Sector Erase SE Sequence Command 43 Figure Block Erase 32KB BE32K Sequence Command 44 Figure Block Erase BE Sequence Command 44

P/N PM1468

MX25V4035 MX25V8035
P/N PM1468

MX25V4035 MX25V8035
4M-BIT [x 1/x 2/x 4] 2.5V CMOS SERIAL FLASH 8M-BIT [x 1/x 2/x 4] 2.5V CMOS SERIAL FLASH

GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• 4M 4,194,304 x 1 bit structure or 2,097,152 x 2 bits two I/O read mode structure or 1,048,576 x 4 bits four I/

O read mode structure 8M 8,388,608 x 1 bit structure or 4,194,304 x 2 bits two I/O read mode structure or 2,097,152 x 4 bits four I/ O read mode structure
• Equal Sectors with 4K byte each, or Equal Blocks with 32K byte each or Equal Blocks with 64K byte each - Any Block can be erased individually
• Single Power Supply Operation - to volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V

PERFORMANCE
• High Performance
- Fast read - 1 I/O 66MHz with 8 dummy cycles - 2 I/O 50MHz with 4 dummy cycles, equivalent to 100MHz - 4 I/O 50MHz with 6 dummy cycles, equivalent to 200MHz
- Fast program time 1.7ms typ. and 6ms max. /page 256-byte per page - Byte program time 15us typical - Continuously program mode automatically increase address under word program mode - Fast erase time 80ms typ. /sector 4K-byte per sector 0.6s typ. /block 32K-byte per block 1s typ. /block 64K-byte per block 7.5s typ. /chip for 4M 13s typ. /chip for 8M
• Low Power Consumption - Low active read current 12mA max. at 66MHz, 6mA max. at 40MHz - Low active erase/programming current 15mA typ. - Low standby current 7uA max.
• Deep Power Down 7uA max.
• Minimum 100,000 erase/program cycles
• 20 years data retention

SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- Block lock protection The BP0-BP3 status bit defines the size of the area to be software protection against program and erase instructions - Additional 512-bit secured OTP for unique identifier
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected sector or block - Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
program pulse widths Any page to be programed should have page in the erased state first
• Status Register Feature
• Electronic Identification
- JEDEC 1-byte manufacturer ID and 2-byte device ID

P/N PM1468

MX25V4035 MX25V8035
- RES command for 1-byte Device ID - Both REMS,REMS2 and REMS4 commands for 1-byte manufacturer ID and 1-byte device ID

HARDWARE FEATURES
• SCLK Input
- Serial clock input
• SI/SIO0
- Serial Data Input or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode
• SO/SIO1
- Serial Data Output or Serial Data Input/Output for 2 x I/O read mode and 4 x I/O read mode
• WP#/SIO2
- Hardware write protection or serial data Input/Output for 4 x I/O read mode
• RESET#/HOLD#/SIO3
- Hardware Reset/HOLD/Serial input & Output for 4 x I/O read mode, the pin defaults to be RESET#
• PACKAGE - 8-land WSON 6x5mm
- 8-pin SOP 150mil
- All Pb-free devices are RoHS Compliant

P/N PM1468

MX25V4035 MX25V8035

The MX25V4035 are 4,194,304 bit serial Flash memory, which is configured as 524,288 x 8 internally. When it is in two or four I/O read mode, the structure becomes 2,097,152 bits x 2 or 1,048,576 bits x The MX25V8035 are 8,388,608 bit serial Flash memory, which is configured as 1,048,576 x 8 internally. When it is in two or four I/O read mode, the structure becomes 4,194,304 bits x 2 or 2,097,152 bits x The MX25V4035/MX25V8035 feature a serial peripheral interface and software protocol allowing operation on a simple 4-wire bus while it is in single I/O mode. The four bus signals are a clock input SCLK , a serial data input SI , a serial data output SO and a chip select CS# . Serial access to the device is enabled by CS# input.

When it is in two I/O read mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in four I/O read mode, the SI pin, SO pin, WP# pin and RESET#/HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data output.

The MX25V4035/MX25V8035 provides sequential read operation on whole chip.

After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page 256 bytes basis, or word basis for Continuously program mode, and erase command is executes on sector 4K-byte , block 32K-byte , or block 64K-byte , or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit.

Advanced security features enhance the protection and security functions, please see security features section for more details.

When the device is not in operation and CS# is high, it is put in standby mode and draws less than 7uA DC current.

The MX25V4035/MX25V8035 utilizes MXIC's proprietary memory cell, which reliably stores memory contents even after 100,000 program and erase cycles.

Table Additional Feature Comparison
ORDERING INFORMATION

PART NO. MX25V4035MI-15G

CLOCK MHz

OPERATING CURRENT MAX. mA

MX25V8035MI-15G

MX25V4035ZNI-15G

MX25V8035ZNI-15G

STANDBY CURRENT MAX. uA

TEMPERATURE PACKAGE
-40°C~85°C -40°C~85°C -40°C~85°C -40°C~85°C
8-SOP 150mil 8-SOP 150mil 8-WSON 6x5mm 8-WSON 6x5mm

Remark

Pb-free Pb-free Pb-free Pb-free

P/N PM1468

MX25V4035 MX25V8035

PART NAME DESCRIPTION MX 25 V 4035 M I

OPTION G Pb-free

SPEED 15 66MHz

TEMPERATURE RANGE I Industrial -40°C to 85°C

PACKAGE M 150mil 8-SOP ZN WSON

DENSITY & MODE 4035 4Mb 8035 8Mb

TYPE V 2.5V

DEVICE 25 Serial Flash

P/N PM1468

PACKAGE INFORMATION

MX25V4035 MX25V8035

P/N PM1468

MX25V4035 MX25V8035

P/N PM1468

MX25V4035 MX25V8035

Removed "Preliminary" title

Corrected error

P32,49

Removed note 4 from Erase and Programming Performance table P49

Modified General Description as 4-wire bus and added CS#

Date JUL/30/2009 DEC/18/3009

JUL/23/2010

P/N PM1468

MX25V4035 MX25V8035

Macronix's products are not designed, manufactured, or intended for use for any high risk applications in which the failure of a single component could cause death, personal injury, severe physical damage, or other substantial harm to persons or property, such as life-support systems, high temperature automotive, medical, aircraft and military application. Macronix and its suppliers will not be liable to you and/or any third party for any claims, injuries or damages that may be incurred due to use of Macronix's products in the prohibited applications. Copyright Macronix International Co., Ltd. All Rights Reserved. Macronix, MXIC, MXIC Logo, MX Logo, MXSMIO, are trademarks or registered trademarks of Macronix International Co., Ltd. The names and brands of other companies are for identification purposes only and may be claimed as the property of the respective companies. For the contact and order information, please visit Macronix’s Web site at:

MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice. 55

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived MX25V8035ZNI-15G Datasheet file may be downloaded here without warranties.

Datasheet ID: MX25V8035ZNI-15G 646952