MX25L12865EZNI-10G

MX25L12865EZNI-10G Datasheet


MX25L6465E MX25L12865E

Part Datasheet
MX25L12865EZNI-10G MX25L12865EZNI-10G MX25L12865EZNI-10G (pdf)
Related Parts Information
MX25L12865EMI-10G MX25L12865EMI-10G MX25L12865EMI-10G
MX25L6465EMI-10G MX25L6465EMI-10G MX25L6465EMI-10G
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MX25L6465E MX25L12865E

MX25L6465E/MX25L12865E

HIGH PERFORMANCE SERIAL FLASH SPECIFICATION

P/N PM1557

MX25L6465E MX25L12865E

Contents
5 GENERAL 7

Table Additional Features 7 PIN 8 PIN 8 BLOCK 9 DATA 10

Table Protected Area 11 Table 4K-bit Secured OTP 11 Memory 12 Table Memory Organization for 12 Table Memory Organization for 13 DEVICE 14 Figure Serial Modes Supported for Normal Serial 14 Figure Serial Modes Supported for Double Transfer Rate serial read 14 HOLD 15 Figure Hold Condition Operation 15 COMMAND 16 Table Command 16 1 Write Enable 18 2 Write Disable 18 3 Read Identification 18 4 Read Status Register 19 5 Write Status Register 20 Protection 20 6 Read Data Bytes 21 7 Read Data Bytes at Higher Speed 21 8 Fast Double Transfer Rate Read 21 9 2 x I/O Read Mode 21 10 2 x I/O Double Transfer Rate Read Mode 22 11 4 x I/O Read Mode 22 12 4 x I/O Double Transfer Rate Read Mode 23 13 Sector Erase 23 14 Block Erase 24 15 Block Erase 24 16 Chip Erase 24 17 Page Program 25 18 4 x I/O Page Program 25 Program/Erase Flow 1 with read array 26 Program/Erase Flow 2 without read array 27 19 Continuously program mode CP 28 20 Parallel Mode Highly recommended for production throughputs 28 21 Deep Power-down 29 22 Release from Deep Power-down RDP , Read Electronic Signature 29 23 Read Electronic Manufacturer ID & Device ID REMS , REMS2 , REMS4 , REMS4D ........................ 29 Table ID Definitions 30

P/N PM1557

MX25L6465E MX25L12865E
24 Enter Secured OTP 30 25 Exit Secured OTP 30 26 Read Security Register 30 Security Register 31 27 Write Security Register 31 28 Write Protection Selection 32 BP and SRWD if 32 The individual block lock mode is effective after setting 33 WPSEL 34 29 Single Block Lock/Unlock Protection 35 Block Lock 35 Block Unlock 36 30 Read Block Lock Status 37 31 Gang Block Lock/Unlock 37 32 Clear SR Fail Flags 37 33 Enable SO to Output RY/BY# 37 34 Disable SO to Output RY/BY# 37 35 Read SFDP Mode 38 Read Serial Flash Discoverable Parameter RDSFDP 38 Table a-1. Signature and Parameter Identification Data Values for 39 Table b-1. Parameter Table 0 JEDEC Flash Parameter Tables for 40 Table c-1. Parameter Table 1 Macronix Flash Parameter Tables for 42 Table a-2. Signature and Parameter Identification Data Values for 43 Table b-2. Parameter Table 0 JEDEC Flash Parameter Tables for 44 Table c-2. Parameter Table 1 Macronix Flash Parameter Tables for 46 POWER-ON 48 ELECTRICAL 49 ABSOLUTE MAXIMUM 49 Figure Maximum Negative Overshoot 49 CAPACITANCE TA = 25°C, f = 49 Figure Maximum Positive Overshoot 49 Figure OUTPUT 50 Table MX25L6465E DC CHARACTERISTICS Temperature = -40°C to 85°C for Industrial grade, VCC = 2.7V ~ 3.6V 51 Table MX25L12865E DC CHARACTERISTICS Temperature = -40°C to 85°C for Industrial grade, VCC = 2.7V ~ 3.6V 52 Table MX25L6465E AC CHARACTERISTICS Temperature = -40°C to 85°C for Industrial grade, VCC = 2.7V ~ 3.6V 53 Table MX25L12865E AC CHARACTERISTICS Temperature = -40°C to 85°C for Industrial grade, VCC = 2.7V ~ 3.6V 55 Timing 57 Figure Serial Input 57 Figure Output 57 Figure Serial Input Timing for Double Transfer Rate 58 Figure Serial Output Timing for Double Transfer Rate 58 Figure Hold 59 Figure WP# Disable Setup Timing and Hold Timing during WRSR when 59 Figure Write Enable WREN Sequence Command 60 Figure Write Disable WRDI Sequence Command 60 Figure Read Identification RDID Sequence Command 60

P/N PM1557

MX25L6465E MX25L12865E
P/N PM1557

MX25L6465E MX25L12865E
64/128M-BIT [x 1/x 2/x 4] CMOS MXSMIOTM SERIAL MULTI I/O FLASH MEMORY

GENERAL
• Serial Peripheral Interface compatible -- Mode 0 and Mode 3
• 64Mb 67,108,864 x 1 bit structure or 33,554,432 x 2 bits two I/O mode structure or 16,777,216 x 4 bits four I/

O mode structure 128Mb 134,217,728 x 1 bit structure or 67,108,864 x 2 bits two I/O mode structure or 33,554,432 x 4 bits four I/O mode structure
• 4096 Equal Sectors with 4K bytes each - Any Sector can be erased individually
• 512 Equal Blocks with 32K bytes each - Any Block can be erased individually
• 256 Equal Blocks with 64K bytes each - Any Block can be erased individually
• Power Supply Operation - to volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V

PERFORMANCE
• High Performance

VCC = 2.7~3.6V - Normal read - 50MHz - Fast read Normal Serial Mode - 1 I/O 104MHz with 8 dummy cycles - 2 I/O 70MHz with 4 dummy cycles - 4 I/O 70MHz with 6 dummy cycles - Fast read Double Transfer Rate Mode - 1 I/O 50MHz with 6 dummy cycles - 2 I/O 50MHz with 6 dummy cycles - 4 I/O 50MHz with 8 dummy cycles - Fast program time 1.4ms typ. and 5ms max. /page 256-byte per page - Byte program time 9us typical - Continuously Program mode automatically increase address under word program mode - Fast erase time 60ms typ. /sector 4K-byte per sector 0.7s typ. /block 64K-byte per block 50s typ. /chip
for 64Mb, 80s typ. /chip for 128Mb
• Low Power Consumption
- Low active read current 19mA max. at 104MHz, 15mA max. at 66MHz and 10mA max. at 33MHz - Low active programming current 25mA max. - Low active erase current 25mA max. - Low standby current 50uA max. /64Mb, 100uA max. /128Mb - Deep power down current 128Mb is 40uA max. , 64Mb is 20uA max.
• Typical 100,000 erase/program cycles

P/N PM1557

MX25L6465E MX25L12865E

SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Advanced Security Features
- BP0-BP3 block group protect - Flexible individual block protect when OTP WPSEL=1 - Additional 4K bits secured OTP for unique identifier
• Auto Erase and Auto Program Algorithms
- Automatically erases and verifies data at selected sector - Automatically programs and verifies data at selected page by an internal algorithm that automatically times the
program pulse width Any page to be programed should have page in the erased state first.
• Status Register Feature
• Electronic Identification
- JEDEC 1-byte Manufacturer ID and 2-byte Device ID
- RES command for 1-byte Device ID - Both REMS,REMS2, REMS4 and REMS4D commands for 1-byte Manufacturer ID and 1-byte Device ID
• Support Serial Flash Discoverable Parameters SFDP mode

HARDWARE FEATURES
• SCLK Input
- Serial clock input
• SI/SIO0
- Serial Data Input or Serial Data Input/Output for 2 x I/O mode and 4 x I/O mode
• SO/SIO1/PO7
- Serial Data Output or Serial Data Input/Output for 2 x I/O mode and 4 x I/O mode or Parallel Data
• WP#/SIO2
- Hardware write protection or serial data Input/Output for 4 x I/O mode
• HOLD#/SIO3
- Pause the chip without diselecting the chip or serial data Input/Output for 4 x I/O mode
• PO0~PO6
- For parallel mode data only 128Mb provide parallel mode
• PACKAGE
- 16-pin SOP 300mil - 8-WSON 8 x 6mm - 8-pin SOP 200mil only for MX25L6465E
- All devices are RoHS Compliant

P/N PM1557

MX25L6465E MX25L12865E

MX25L6465E is 67,108,864 bits serial Flash memory, which is configured as 8,388,608 x 8 internally. When it is in two or four I/O mode, the structure becomes 33,554,432 bits x 2 or 16,777,216 bits x MX25L12865E is 134,217,728 bits serial Flash memory, which is configured as 16,777,216 x 8 internally. When it is in two or four I/O mode, the structure becomes 67,108,864 bits x 2 or 33,554,432 bits x The MX25L6465E/12865E features a serial peripheral interface and software protocol allowing operation on a simple 4-wire bus. The four bus signals are a clock input SCLK , a serial data input SI , a serial data output SO , and a chip select CS# . Serial access to the device is enabled by CS# input.

MX25L6465E/12865E provides high performance read mode, which may latch address and data on both rising and falling edge of clock. By using this high performance read mode, the data throughput may be doubling. Moreover, the performance may reach direct code execution, the RAM size of the system may be reduced and further saving system cost.

MX25L6465E/12865E, MXSMIOTM Serial Multi I/O flash memory, provides sequential read operation on whole chip and multi-I/O features.

When it is in dual I/O mode, the SI pin and SO pin become SIO0 pin and SIO1 pin for address/dummy bits input and data output. When it is in quad I/O mode, the SI pin, SO pin, WP# pin and HOLD# pin become SIO0 pin, SIO1 pin, SIO2 pin and SIO3 pin for address/dummy bits input and data Input/Output. Parallel mode is also provided in this device. It features 8 bit input/output for increasing throughputs. This feature is recommeded to be used for factory production purpose.

After program/erase command is issued, auto program/ erase algorithms which program/ erase and verify the specified page or sector/block locations will be executed. Program command is executed on byte basis, or page 256 bytes basis, or word basis for Continuously Program mode, and erase command is executes on sector 4K-byte , block 32K-byte/64K-byte , or whole chip basis.

To provide user with ease of interface, a status register is included to indicate the status of the chip. The status read command can be issued to detect completion status of a program or erase operation via WIP bit.
ORDERING INFORMATION
64Mb PART NO.

CLOCK MHz

OPERATING CURRENT MAX. mA

MX25L6465EMI-10G

MX25L6465EM2I-10G

MX25L6465EZNI-10G

STANDBY CURRENT MAX. uA

TEMPERATURE PACKAGE
-40°C~85°C -40°C~85°C -40°C~85°C
16-SOP 300mil
8-SOP 200mil
8-WSON 8x6mm

Remark
128Mb PART NO.

MX25L12865EMI-10G MX25L12865EZNI-10G

CLOCK MHz

OPERATING CURRENT MAX. mA

STANDBY CURRENT MAX. uA

TEMPERATURE PACKAGE
-40°C~85°C -40°C~85°C
16-SOP 300mil
8-WSON 8x6mm

Remark

P/N PM1557

MX25L6465E MX25L12865E

PART NAME DESCRIPTION MX 25 L 12865E M I

OPTION G RoHS Compliant

SPEED 10 104MHz

TEMPERATURE RANGE I Industrial -40° C to 85° C

PACKAGE M 300mil 16-SOP M2 200mil 8-SOP ZN 8x6mm 8-WSON

DENSITY & MODE 12865E 128Mb standard type
6465E 64Mb standard type

TYPE L 3V

DEVICE 25 Serial Flash

P/N PM1557

PACKAGE INFORMATION

MX25L6465E MX25L12865E

P/N PM1557

MX25L6465E MX25L12865E

P/N PM1557
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Datasheet ID: MX25L12865EZNI-10G 646940