ORSPI4-EV

ORSPI4-EV Datasheet

ORSPI4 Evaluation Board

Part	Datasheet
ORSPI4-EV	ORSPI4-EV (pdf)

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ORSPI4 Evaluation Board User’s Guide July 2004 ebug06_01 Lattice Semiconductor ORCA ORSPI4 Evaluation Board User’s Guide Introduction This user’s guide describes the Lattice evaluation board for the ORSPI4 device, a stand-alone evaluation PCB that provides a functional platform for device feature demonstrations. The board includes the following features: • Power connections • programming support • On-board and external reference clock sources • High-speed interconnections to both SPI4.2 compliant interfaces • SPI4.2 interface logic analyzer connections • Quad Data Rate memory controller interface to SRAM device • Discrete high-speed interface SMA test points and clock connections • ORCAstra Demonstration Software interface • SERDES high-speed layout structures The contents of this user’s guide include top-level functional descriptions of the various portions of the evaluation board, descriptions of the connectors, diodes and switches and a complete set of schematics for version of the board. Figure 1 shows the functional partitioning of the board. Figure ORSPI4 Evaluation Board Lattice Semiconductor ORCA ORSPI4 Evaluation Board User’s Guide An 8-pin connector that provides the interface to the cable. Pin Number Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8 Signal VDD TDO TDI NC TMS GND TCK A 7-pin serial connector used for serial Pin Number Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Signal GND NC PROGRMN DONE D0 CCLK VDD Header Connections Standard headers are provided for interconnecting points on the board. This can be accomplished with IDC connectors and ribbon cable for bus connections or pin socket patch cords such as Pomona Electronics #5948 jumpers shunts are also used for board selections such as Sullins Electronics P/N SPC02SYAN D1, D2 These LEDs indicate the status of to the FPGA DONE/INITN status pins. When D2 is illuminated, this indicates the successful completion of Illumination of D1 indicates that the programming was aborted or reinitialized. J21, 24 These standard 3x1 headers provide connections of the PROGRAMN and RESETN control pins. For standard evaluation board use, a 2-pin shunt should be placed across pins 1 and This will connect the pins to on-board push-button switches. Pin Number Signal Pin 1 Local Pin 2 RESETN Pin 3 Global Pin 1 Local Pin 2 PROGRMN Pin 3 Global Lattice Semiconductor ORCA ORSPI4 Evaluation Board User’s Guide J23, 26

PDF Datasheet Preview

ORSPI4 Evaluation Board

User’s Guide

July 2004 ebug06_01

Lattice Semiconductor

ORCA ORSPI4 Evaluation Board User’s Guide

Introduction

This user’s guide describes the Lattice evaluation board for the ORSPI4 device, a stand-alone evaluation PCB that provides a functional platform for device feature demonstrations. The board includes the following features:
• Power connections
• programming support
• On-board and external reference clock sources
• High-speed interconnections to both SPI4.2 compliant interfaces
• SPI4.2 interface logic analyzer connections
• Quad Data Rate memory controller interface to SRAM device
• Discrete high-speed interface SMA test points and clock connections
• ORCAstra Demonstration Software interface
• SERDES high-speed layout structures

The contents of this user’s guide include top-level functional descriptions of the various portions of the evaluation board, descriptions of the connectors, diodes and switches and a complete set of schematics for version of the board. Figure 1 shows the functional partitioning of the board.

Figure ORSPI4 Evaluation Board

Lattice Semiconductor

ORCA ORSPI4 Evaluation Board User’s Guide

An 8-pin connector that provides the interface to the cable.

Pin Number Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7 Pin 8

Signal VDD TDO TDI NC TMS GND TCK

A 7-pin serial connector used for serial

Pin Number Pin 1 Pin 2 Pin 3 Pin 4 Pin 5 Pin 6 Pin 7

Signal GND NC PROGRMN DONE D0 CCLK VDD

Header Connections

Standard headers are provided for interconnecting points on the board. This can be accomplished with IDC connectors and ribbon cable for bus connections or pin socket patch cords such as Pomona Electronics #5948 jumpers shunts are also used for board selections such as Sullins Electronics P/N SPC02SYAN

D1, D2

These LEDs indicate the status of to the FPGA DONE/INITN status pins. When D2 is illuminated, this indicates the successful completion of Illumination of D1 indicates that the programming was aborted or reinitialized.

J21, 24

These standard 3x1 headers provide connections of the PROGRAMN and RESETN control pins. For standard evaluation board use, a 2-pin shunt should be placed across pins 1 and This will connect the pins to on-board push-button switches.

Pin Number

Signal

Pin 1

Local

Pin 2

RESETN

Pin 3

Global

Pin 1

Local

Pin 2

PROGRMN

Pin 3

Global

Lattice Semiconductor

ORCA ORSPI4 Evaluation Board User’s Guide

J23, 26

Notice: we do not provide any warranties that information, datasheets, application notes, circuit diagrams, or software stored on this website are up-to-date or error free. The archived ORSPI4-EV Datasheet file may be downloaded here without warranties.

Datasheet ID: ORSPI4-EV 645494